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DS90UB948-Q1: 947 and 948 I2C transparent transmission issue

Part Number: DS90UB948-Q1

Hi team,

When we used 947 and 948 for IIC transparent transmission, we encountered such an occasional problem. Both sides of 947 and 948 were connected with logic analyzers. The phenomenon we can see is that there is a data waveform in the pulse of 947 but not in the side of 948 as below. Could you help explain this phenomenon? How can this system work normally?

  • Hi Hale,

    When does the problem occur? It's mentioned as occasional, so the issue occurs after a duration of operation, and if so how long does this take?

    For the logic analysis, is this taken between the two devices (isolated to FPD-Link) or are these transactions taken between SoC - SER / DES - Target devices?

    Last question - does the occasional problem prevent any further communications on the I2C bus, or does it return to normal state after a while?

    Thanks,

    Miguel

  • Hi Miguel,

    The hardware is probably such a SoC---SER---DES---MCU, and the logic analyzer is respectively connected to the middle of the SOC---SER and the middle of the DES---MCU. Every time it occurs when the SOC writes a large amount of data, because it is an upgrade, all the data in a bin file needs to be transmitted to the MCU, so it is always writing when there is a large amount of data, and the amount of data written each time is 128 characters However, they also tried to write 64 bytes for the amount of data, and this problem also occurs; the running time seems to be irrelevant at present, and the upgrade starts after a few seconds after the connection, or the upgrade takes a longer period of time after the connection. This problem will always occur; after the problem occurs, they will re-transmit the data. For example, the data volume is 128 bytes each time. they just started from 0. The probability of success is not necessarily one time. Sometimes it is successful after one retransmission, and sometimes it is successful after three or four retransmissions.

    And the customer replied that when they add video data from 947 to 948, the transparent transmission seems work well. Can you explain the phenomenon?

  • Hi Hale,

    Thank you for the additional information. A possible contribution to the phenomenon experienced in the system could be related to the bit error rate experienced in the channel. The more bytes that are sent at once (such as the update data), the more likely an error is to occur during the transmission.

    To explore this:

    1. May I have more information on the type of cabling, length of the connection, and AC coupling that is used between the SER-DES?

    2. Could you provide a larger scope of the I2C transaction, before and after the phenomenon to have more context of the I2C states and what type of transmissions are being sent? A larger time scale could help provide context to the situation.

    Best,

    Miguel

  • Hale,

    May I also see the FPD device interface schematic, and what rate the backchannel is operating?

    Thanks,

    Miguel