DS160PR412: DS160PR412 pkg and IBIS AMI models

Hi Qian,

Qian Li said:

1. For a rough estimation, how much IL budget the redriver is expected to extend? 

From page 21 of the DS160PR412 datasheet, "with the DS160PR412 in the link, the total channel loss between a PCIe root complex and an end-point can be extended up to 42 dB at 8 GHz". So 42 dB of total channel loss at PCIe Gen 4 speeds should be a reasonable estimate.

Qian Li said:

2. For redriver pkg(both Tx and Rx) s parameters that included in IBIS AMI model folders, S21 and S12 are quite different, S12 and S22 are ~-300dB, which doesn't make sense. Please help to check.

Are you using ADS 2023 software? If so, our method of calculating the S-parameters is to use the Differential tab of the S-Parameter Viewer. If you are looking at the Loaded Data tab then the S[x, y] calculations and plots may not be accurate. Let us know if you need assistance with this process, in the meantime I will try to obtain the package models for myself and take a look.

Qian Li said:

3. For redriver, Rx IBIS AMI model is not auto adaptive, meaning during the simulation, I have to manually pick some values for each EQ parameter. If adding parameters from overall channel Tx and Rx EQ parameters, that will be a huge number to sweep. Just wondering if there will be any plan to update the redriver pkg and IBIS AMI models?

We don't have plans to update the redriver IBIS-AMI models so unfortunately manual sweeping is required. However depending on your simulation goals, you may not need to sweep every single combination of channel settings.

Best,

Evan Su

Hi Evan,

Thank you very much for your reply.

So the redriver can expected to extend ~14dB IL besides spec at ~28dB, that is a strong redriver.

For the calculation method you mentioned in 2, do you have any document on how to do it with more details? Yes, I'm using ADS2023, and used the S parameter kit as marked below to check S parameter and calculate to differential mode too. Please check the pkg model from your side, I never seen such pkg model before.

Our overall channel is shown below, it's from PCIe SW to SSD, redriver is between them. redriver is located at ~-17dB from PCIe SW; and ~-6dB to SSD. For the channel below, it is expected to have healthy open eye even without redriver. However, right now I couldn't find the open eye even with redriver there in more than 5000 cases during sweep. Please help to provide possible optimized eq settings for redriver.

Thanks,

Qian

Hi Qian,

I have examined two files: RX_PKG_nom.s4p and TX_PKG_nom.s4p. Here is the procedure that I used to calculate the insertion loss:

• Open file in S-parameter Viewer, disregard the plots in the Loaded Data tab
• Go to Single-Ended tab, confirm that the through ports are configured this way:
  • 
  • If they are not, remove them and reassign the through ports into this configuration
• Go to the Differential tab
  • The ports from the Single-Ended tab should now be available, click the "Calculate Differential Data" button
  • After the data is calculated, go to the Matrix Selector at the bottom and click S[D2, D1], this should be the differential insertion loss

I tried using the package files in a simulation (default 20 dB example simulation included in the ZIP file for the IBIS and package models, corrected all the file references) and the results seemed reasonable. Make sure the port arrangement of the SnP file is like this:

Here is another useful discovery I found that may be helpful for you: I am used to working with the IBIS-AMI models for our PCIe Gen 5 devices, which have an EQ index AMI setting so you do not have to sweep multiple EQ boosts. The DS160PR412 device also has an EQ index architecture, but the DS160PR412 IBIS-AMI model for some reason does not have an EQ index AMI setting. So as a workaround, when you run simulations, you may manually sweep through EQ indices by looking up which combination of EQ1 and EQ2 each index corresponds to, and then disregard the other possible combinations of EQ1 and EQ2. When the device is being physically implemented into the system, almost all customers use EQ indices for CTLE control.

Here is a table from the DS160PR412 programming guide listing the amount of dB compensation per index:

Unfortunately I can't find a table from the Gen 4 redriver datasheets or programming guides directly describing what each EQ index means in terms of EQ1 and EQ2. If you have or can obtain our SigCon Architect software with the DS160PR810 or DS160PR410 device profiles, you can run the profiles in demo mode and use the High Level Page --> Block Diagram screen to examine each EQ Index, it will then tell you that information:

If I have time next week I will try to make a simple table of this for future reference.

Best,

Evan Su

Hi Evan,

Thanks for the details. I did exactly the same as what you did in S parameter viewer for redriver pkg s parameters. If you just check S[D2, D1] and S[D1, D1], it looks normal as below. However, if you also check S[D1,D2] and S[D2, D2], the figure is below too. If we step back to check single ended model there, you may see S21 and S12 in pkg is quite different. And because it is passive model, S12 should be similar to S21.  It is similar for S34, S43, S33, S44 too. This seems not make sense to me. 

One more question, previously you mentioned the redriver can extend the channel up to 42dB of channel, meaning roughly it can extend ~14dB of IL. Is there any way that we can simulate or measure at our side to verify this performance?

Thanks,

Qian

Hi Qian,

I will check with my team about the redriver TX/RX model S-parameter behavior. I do not normally look at S[D1, D2] and S[D1, D1] so it is not clear to me what is expected.

Qian Li said:

One more question, previously you mentioned the redriver can extend the channel up to 42dB of channel, meaning roughly it can extend ~14dB of IL. Is there any way that we can simulate or measure at our side to verify this performance?

It takes a lot of testing to determine maximum reach extension and such figures can vary depending on system characteristics (for example, if a system has vias the performance will be degraded more severely than the IL would suggest). For customers we typically recommend starting with a channel loss profile in mind, characterizing it in an ADS simulation, and then tuning the redriver in the simulation until the receiver eye diagram is acceptable. Working in the other direction is difficult.

Best,

Evan Su

Evan,

Yes, Please check with the model generation team for it.

About the simulation method you suggested, it makes sense to me, I will try at my side. 

Thanks,

Qian

Evan,

One more question, when for PCIe gen4 eye diagram channel simulation, what's the recommended PRBS register length and number of bits that needs to be used in simulation?

Thanks,

Qian

Hi Qian,

In my simulations I typically use a PRBS register length of 8, I think this is the default for the Intel TX model I use. For the simulation length, I like to use 100,000 bits if I have time, but if I need to quickly evaluate many iterations then I use 10,000 bits. I am running ADS on a laptop with an Intel i7 processor and 16 GB of RAM, if your computer is more powerful then it should be able to run bigger simulations more quickly.

Generally the eye opening will be smaller if the number of bits is larger due to statistical laws, so a shorter simulation is more "optimistic" in some sense about the eye diagram compared to a longer one. As an example, if I find that a configuration looks bad at 10,000 bits then it will probably not look any better at 100,000 bits, so I would move on to a new configuration and save time. If I find a configuration that looks very good at 10,000 bits, I could take the time to check if it still looks good at 100,000 bits - if it does, I have more confidence that this is close to real life behavior.

Best,

Evan Su

Thank you so much for sharing, Evan.

Will this number of bits vary depending on BER requirement for different interface or spec? or it's generally applicable for most of serial interfaces?

thank you Evan.