SN65LVDS150: PLL frequency multiplication from 13.56 MHz to 433 MHz

Good morning, 

I am currently in the process of designing a PLL system with the objective of achieving an output frequency of 433 MHz, utilizing a 13.56 MHz reference signal that undergoes a multiplication of 32. While reviewing the datasheet for the SN65LVDS150 component, I observed that the stated maximum output frequency is 400 MHz. I am curious if there might be any potential avenues to attain the desired 433 MHz output frequency with this component. If this is not feasible, I am also interested in exploring alternative products that operate on similar principles but can support this higher frequency requirement.

Moreover, I came across the recommendation in the datasheet that advocates for maintaining a maximum reference frequency of 5 MHz when employing a multiplication factor of 32. I am keen to understand the potential ramifications of using a 13.56 MHz reference instead.

Finally, could you kindly provide information regarding the availability of any Evaluation Kits intended for testing purposes with the aforementioned SN65LVDS150 component?

Thank you so much for your support!