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DP83869HM: One of two PHYs not passing Gigabit Complaince

Part Number: DP83869HM
Other Parts Discussed in Thread: AM6442,

Hi

I have two DP83869HM connected to a AM6442. The schematic/BOM of PHY2 is a copy of PHY1 (except address and RGMII port)

PHY1 passed the Gigabit compliance test but on PHY2 the voltage levels of Peak A / Peak B  are far to low (about 590mV).

According to some other threads our magnetics could be wrong, but why is PHY1 passing the compliance test?

Are there any other known reasons?

Regards

Martin   

  • Hi Martin,

    Please share both compliance test reports, as well as the schematic so I can further assist.

    Thanks,

    David

  • Hi David

    I send you a private message

    Martin

  • Hi Martin,

    I will need some time to go through the schematics and reports but am out of office next week. I will get back to you early the following week.

    Thanks,

    David 

  • Hi Martin,

    I had a look at the schematic. As you mentioned in your first post, you are using a center tap connected magnetic which does not meet the datasheet requirements. This is likely the cause of the compliance failure, and the solution would be to switch to a non-center tap connected magnetic. 

    Just to check, are you using the script provided in SNLA239?

     

    Can you share the setup pictures as well?

    Thanks,

    David

  • Hi David

    Yes, I use the scripts from SNLA239. My setup looks like this. I have to use a TCA39306DCURQ1 as levelshifter for MDIO because the PHY is 1.8V and the MSP-EXP430F5529 board is 3.3V. MDIO communication works great that way.

    As both PHYs sit next to each other and the schematic is the same, why is one compliant and the other one not? It is the same connector with the wrong center tap connection? Could there be an additional reason?

    Regards

    Martin

  • Hi Martin,

    Are you using a test fixture with 100ohm differential termination for this test?

    It is not expected to see this much variation in peak voltage between the two PHYs. Note that register 0x1D5 is an extended register so you must use the procedure shown in section 9.4.9.1 of the datasheet. Can you please verify that register 0x1D5 = 0xF508 in both cases before completing the compliance testing?

    Additionally, we have sometimes seen better compliance results when the test is run on only one channel at a time, rather than using 0x0025 = 0x0480 to output on all test channels. Can you please run the test with 0x0025 = 0x420 to output the test mode on only channel B?

    Thanks,

    David

  • Hi David

    Testing one channel at a time with mode 1, 2, and 3 worked. Mode 4 was always one channel at a time. 1000 MBit/s is OK now.

    I have one issue with 100 MBit/s, the negative overshoot is 6,1%. Could that be the result of to short traces between PHY and connector? 

    The official compliance test cable is only 6 inch long, if I use a longer ethernet cable the test is OK.

    Regards

    Martin

  • Hi Martin,

    What is the intended cable type/length to be used in the end application?

    This failure again may be related to the magnetics. Can you share the 100mbps report?

    Thanks,

    David

  • Hi David

    The intended cable length will be longer then 6inch, so I guess we will tolerate that issue and make a remark for the next PCB revision to extend the traces.

    I send you the 100mbps report as private message.

    Regards

    Martin

  • Hi Martin,

    Thanks for sharing the report. As the failure is marginal, normal operation and throughput should not be effected. Let me know if you have any further questions.

    Thanks,

    David