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DP83867E: Not able to link at 1Gbps without auto-neg

Jean-Charles RIAND
Prodigy 10 points
Part Number: DP83867E

Hello,

For aerospace applications we are required to disable auto-neg to : 

1 - Make sure that we always link at the expected speed

2 - And to speed up the link up process after lightning events leading to loss of synchronization

We are able to use the PHY with auto-neg but are not able to reach a valid link state in normal mode. Below is the configuration we apply between the two PHY we are trying to link and the status we get

  • 0
    TI__Mastermind 27122 points

    Hi Jean,

    Who is the link partner? Is it another DP83867? 

    Can you please share a register dump from 0x0 - 0x1E?

    Thanks,

    David

  • 0 in reply to David Creger
    Prodigy 10 points

    Hello,

    Yes, both PHYs are DP83867. Below a full dump of each PHY.

    One dump with Auto-Neg, and one dump without auto-neg.

    PHY1 reg / DP83867 PHY2 Reg / DP83867
    Addr HEX Data (HEX)
    Manual conf    		 Data (HEX)
    Auto Neg    		 Data (HEX)
    Manual conf    		 Data (HEX)
    Auto Neg
    00 140 140 140 140
    01 7949 7949 7949 7949
    02 2000 2000 2000 2000
    03 A231 A231 A231 A231
    04 1 1 1 1
    05 0 0 0 0
    06 64 64 64 64
    07 2001 2001 2001 2001
    08 0 0 0 0
    09 1A00 1A00 1200 1200
    0A 4000 4000 0 0
    0B 0 0 0 0
    0C 0 0 0 0
    0D 401F 401F 401F 401F
    0E 10B0 10B0 10B0 10B0
    0F 3000 3000 3000 3000
    10 5C28 5C28 5C08 5C08
    11 AB02 AB02 A802 A802
    12 0 0 0 0
    13 0 40 40 40
    14 2807 2807 2807 2807
    15 0 0 0 0
    16 0 0 0 0
    17 40 40 40 40
    18 6150 6150 6150 6150
    19 4444 4444 4444 4444
    1A 2 2 2 2
    1B 0 0 0 0
    1C 0 0 0 0
    1D 0 0 0 0
    1E 202 202 202 202

    Thank you for helping

    Jc

  • 0 in reply to Jean-Charles RIAND
    TI__Mastermind 39855 points

    Hello,

    I work on the same team as David. He is OoO due to the Labor Day Holiday. Please expect a delay in his next correspondence. 

    Sincerely,

    Gerome

  • 0 in reply to Gerome Cacho
    TI__Mastermind 39855 points

    Hello,

    Can you further explain the constraint with not using auto-negotiation? We strongly recommend having this setting on and disabling whatever speeds are not being used.

    If the constraint is more hard-fixed, can you enable it for intermediate test between both PHYs to ensure that link can be achieved with the current hardware setup? Once there (and linked up), you may also look at the settings that were auto-negotiated into and try to hard-configure those settings.

    Can you also explain why you had configured the "Force Link Good" bit?

    Sincerely,

    Gerome

  • 0 in reply to Gerome Cacho
    Prodigy 10 points

    Hello,

    Auto negotiation is a too long process, (3-5 secondes from our measurements).

    After a lightning event, having aircraft equipment not able to communicate with each other during flight is not acceptable.

    We currently have a simple configuration that has been working for a year, we are confident with the HW setup.

    I attempt to use the force link good as we do in SGMII core to disable auto neg on the SGMII side as well, it has been proven to work. 

    Can you please tell me what is wrong in the configuration we are applying or provides guidances for troubleshooting

    Best regards

  • 0 in reply to Jean-Charles RIAND
    TI__Mastermind 39855 points

    Hello,

    We are looking into this. Please expect a reply by EoD Friday.

    Sincerely,

    Gerome

  • +1 in reply to Gerome Cacho
    Prodigy 10 points

    Hello,

    Here is an update on my side :

    1 - I added in the previous post a dump of the registers after the auto-neg process side by side the results of the dump in manual mode

    2 - I changed the configuration

    to disable FORCE_LINK_GOOD

    and triggered a SW_RESTART after the reconfiguration

    These changes did not solved the problem

    I also simply try to unplug and plug back the cable to check the status but still can't get a valid link

    For information :

    On the SGMII side, we are using Microchip IP "CoreSGMII_HB", version "HB0627 Handbook CoreSGMII v3.3"

    One way we manage to get a direct SGMII to SGMII link without auto-neg with the core was by using link-up bit 15 register 0x04

    and bit 8 to '1' in register 0x11 preventing a MAC without auto-neg capacity (which is our case) to prevent the link up.

    Best regards

    Jc

  • 0 in reply to Jean-Charles RIAND
    TI__Mastermind 27122 points

    Hi Jean,

    I understand this case is being handled offline, can you please send via email.

    Thanks,

    David

  • 0 in reply to David Creger
    Prodigy 10 points

    Hello David,

    I exchanged the information to the support team.

    Unfortunatly, we came to the conclusion that it was impossible with this part number to fully disable auto-neg.

    The only way to speed up the link time is to reduce the scope of the auto-negotiation process :

    - Manual MDIX configuration

    - Manual Master/Slave configuration

    - Advertise only 1Gbps

    I have yet to test it since we are still facing issue to reach robust auto-neg (but it is a topic outside of the scope of this page)

    Thank you for your help