Hi team,
I'd like to fix the speed at which PHYs link.
Can I fix the speed with the following settings?
BMCR
AUTO-NEGOTIATION ENABLE : Disable
SPEED SELECTION LSB : Selectable
If I need to set other registers, please let me know.
BR,
Kengo.
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Hi team,
I'd like to fix the speed at which PHYs link.
Can I fix the speed with the following settings?
BMCR
AUTO-NEGOTIATION ENABLE : Disable
SPEED SELECTION LSB : Selectable
If I need to set other registers, please let me know.
BR,
Kengo.
Hello,
Thank you for your query. Currently, US offices are closed for Labor Day holiday. Please expect a response during the middle of the week.
Sincerely,
Gerome
Hello,
Which speed are you looking to fix at? It is generally recommended to have auto-negotiation on in all situations.
Sincerely,
Gerome
Hi,
thank you for your reply.
My customer wants to fix to 10BASE or 100BASE.
When I specify the speed in "SPEED SELECTION LSB" and "SPEED SELECTION MSB", only 10BASE is linked up.
100/1000Base is not linked up.
Why can only 10BASE be linked up?
Could you tell me how to fix to 10BASE or 100BASE?
BR.
Kengo.
Hi Kengo,
I recreated the same experiment in lab with 2x DP83867 SGMII EVMs. The only register to change I needed to change was Reg 0x0. For 100mbps link, both PHYs need to be Reg 0x0 = 0x2100. For 10mbps link, both PHYs need to be Reg 0x0 = 0x100.
For 10mbps link, reg 0x11 = 0x3F00 or 0x3C00. For 100mbps link, Reg 0x6C02 or 0x6F02.
What is the link partner of DP83867. It is important to note that both PHYs need to be auto-negotiation disable. If one PHY is auto-negotiation disable and the other is enable, there will not be link.
Sincerely,
Gerome
Hi Gerome,
Thank you so much for checking the EVM and report.
I understood that it can be used at a fixed speed.
However, our setting is the same as your result.
Could you tell me some questions?
1 : Please let me know the trap setting.
2 : When I want to communicate at 100mbps, I write Reg 0x0 = 0x2100,
What logic should be used for "TXCLK", "RXCLK", "TX_CTRL", "RX_CTRL", "TX_D0-D3" and "RX_D0-D3" in PHY during and after writing?
BR.
Kengo.
Hi Kengo,
The MAC interface will adapt accordingly. There shouldn't be any configuration for MAC interface wrt/ speed.
For strap setting, there is no clear cut way to get 100 or 10 forced speed communication. This will have to be done via register.
Sincerely,
Gerome
Hi Gerome,
Thank you for your support.
For unlinked devices, TX_CLK, TX_CTRL and TX_D[3:0] were OPEN.
Auto-negotiation was able to link up with this setting.
If the speed is fixed, is there any communication on TX_CLK, TX_CTRL and TX_D[3:0] ?
BR.
Kengo.
Hi Kengo,
For RGMII, our TX_ pins are inputs. Therefore if the MAC is not driving the line, that could be why.
Sincerely,
Gerome
Hi Gerome,
Thank you for your reply.
Is it possible to communicate by fixing the logic of the TX_pin?
If so, what should I set the logic?
And, could you explain why auto-negotiation and fixed speed cannot be connected?
BR.
Kengo.
Hi Kengo,
I don't understand what you mean by "fixing the logic" of the TX_ pins. Is it possible to reword? These pin states are set by the MAC interface standard.
For auto-negotiation, the PHY will be sending out and expecting link pulses on the line. When fixed speed is set, the PHY will be beginning to send out signals that are not link pulses. Thus, there is a mismatch in expected signaling for linkup.
Sincerely,
Gerome
Hi Gerome,
Thank you for your quick reply.
It's very helpful for me.
Sorry for the lack my information.
Due to the circuit, I'd like to fix the TX_pins to Low or High.
If fixed logic is difficult, please let me know.
BR.
Kengo.
Hi Kengo,
The TX pins are floating from a PHY standpoint. I don't believe there is any logic to gain control of these pins as these are designated inputs. MAC should either drive the line to a specific voltage.
Sincerely,
Gerome
Hi Kengo,
What do you mean this pin "needs to be allowed to communicate"? Depending on the MAC interface, the MAC will drive these pins accordingly.
Sincerely,
Gerome