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SN65DPHY440SS: The retimer IC will cause the LP-->HS a peak and HS-->LP a bit flip

Part Number: SN65DPHY440SS


When we use the retimer to drive camera MIPI signal, the DB output will have peak as the capture shows:but when camera sensor connect to SOC directly, it does not have .

LP-->HS peak

When the HS exit to LP,the THS-skip window has a bit flip.

bit flip 1

bit flip 0

Are they caused by the IC design bug or the design principle ?