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DS90UB941AS-Q1: How to config register to connect 948 with DOUT0?

xuefei Yuan
Prodigy 110 points
Part Number: DS90UB941AS-Q1

Hi expert,

I previously used DOUT0 and DOUT1 to connect 948. 

The following is the register configuration.

ds941_write_reg(0x03, 0x08); //Pass-Through Enabled
ds941_write_reg(0x01, 0x08); //Disable dsi input
ds941_write_reg(0x07, 0x82); //Slave id
ds941_write_reg(0x08, 0x82); //Slave Alias
ds941_write_reg(0x5e, 0x7f); //Freq detect high threshold
ds941_write_reg(0x40, 0x04); //TSKIP_CNT programming
ds941_write_reg(0x41, 0x05); //TSKIP_CNT programming
ds941_write_reg(0x42, 0x09); //TSKIP_CNT programming
ds941_write_reg(0xc6, 0x21); //ISR
ds941_write_reg(0x0d, 0x07); //GPIO0
ds941_write_reg(0x0e, 0x33); //GPIO1 and GPIO2
ds941_write_reg(0x0f, 0x03); //GPIO3
ds941_write_reg(0x01, 0x00); //Enable dsi input
ds941_write_reg(0x03, 0x08); //ensure Pass-Through Enabled

Now I need to use only DOUT0 to connect 948

but failed with the original register configuration.

ds941_write_reg(0x03, 0x08); //Pass-Through Enabled
ds941_write_reg(0x01, 0x08); //Disable dsi input
ds941_write_reg(0x07, 0x82); //Slave id
ds941_write_reg(0x08, 0x82); //Slave Alias
ds941_write_reg(0x5e, 0x7f); //Freq detect high threshold
ds941_write_reg(0x40, 0x04); //TSKIP_CNT programming
ds941_write_reg(0x41, 0x05); //TSKIP_CNT programming
ds941_write_reg(0x42, 0x09); //TSKIP_CNT programming
ds941_write_reg(0xc6, 0x21); //ISR
ds941_write_reg(0x0d, 0x07); //GPIO0
ds941_write_reg(0x0e, 0x33); //GPIO1 and GPIO2
ds941_write_reg(0x0f, 0x03); //GPIO3
ds941_write_reg(0x01, 0x00); //Enable dsi input
ds941_write_reg(0x03, 0x08); //ensure Pass-Through Enabled

How do I modify the register configuration?

Thank you.

  • 0
    TI__Mastermind 29715 points

    Hey xuefei,

    xuefei Yuan said:
    but failed with the original register configuration.

    When you say failed you mean you don't see video lock between on the Des side? Do you see link established between Ser and Des, does I2C work locally and remotely ?

    Do you have both Ser/Des set to the correct mode straps? Coax Vs. STP ?

    xuefei Yuan said:
    ds941_write_reg(0x40, 0x04); //TSKIP_CNT programming
    ds941_write_reg(0x41, 0x05); //TSKIP_CNT programming
    ds941_write_reg(0x42, 0x09); //TSKIP_CNT programming

    This tskip value need to change based on Pclk and number of DSI lanes used in your system. Is this the same for the new system?

    xuefei Yuan said:
    How do I modify the register configuration?

    Can you provide a register dump of your non-working system? What PCLK is used here?

    Example, reg 0x5B tells you what mode you are operating in. 

    Regards,
    Fadi A.

  • 0 in reply to Fadi Abdulhameed
    Prodigy 110 points
    Fadi Abdulhameed said:
    This tskip value need to change based on Pclk and number of DSI lanes used in your system. Is this the same for the new system?

    Yes, it's the same.

    Fadi Abdulhameed said:
    Can you provide a register dump of your non-working system? What PCLK is used here?

    This is the register dump.

  • 0 in reply to xuefei Yuan
    TI__Mastermind 29715 points

    Hey xuefei,

    Register 0x5b is set to 0x87 which is forcing splitter mode. This won't work for a single lane connection. Also, this is a Coax system?

    If it's a coax system you need register 0x5b to be set to 0x81

    board.WriteI2C(Ser_addr,0x5B,0x81) #Forced Coax config and Single FPD-Link III Transmitter mode (Port 1 disabled)

    Regards,
    Fadi A.

  • 0 in reply to Fadi Abdulhameed
    Prodigy 110 points
    Fadi Abdulhameed said:
    Also, this is a Coax system?

    This is a twisted pair system.

  • 0 in reply to xuefei Yuan
    Prodigy 110 points

    I tried configuring the two registers 0x5b and 0x4f, but still can't establish connection.

    This is new register configuration.

    ds941_write_reg(0x03, 0x08); //Pass-Through Enabled
    ds941_write_reg(0x01, 0x08); //Disable dsi input
    ds941_write_reg(0x07, 0x82); //Slave id
    ds941_write_reg(0x08, 0x82); //Slave Alias
    ds941_write_reg(0x5e, 0x7f); //Freq detect high threshold
    ds941_write_reg(0x40, 0x04); //TSKIP_CNT programming
    ds941_write_reg(0x41, 0x05); //TSKIP_CNT programming
    ds941_write_reg(0x42, 0x09); //TSKIP_CNT programming

    ds941_write_reg(0x5b, 0x00); //Automatically detect the mode of FPD Link
    ds941_write_reg(0x4f, 0x0c); //SET DSI_CONTINUOUS_CLK,4 lanes,port 0

    ds941_write_reg(0xc6, 0x21); //ISR
    ds941_write_reg(0x0d, 0x07); //GPIO0
    ds941_write_reg(0x0e, 0x33); //GPIO1 and GPIO2
    ds941_write_reg(0x0f, 0x03); //GPIO3
    ds941_write_reg(0x01, 0x00); //Enable dsi input
    ds941_write_reg(0x03, 0x08); //ensure Pass-Through Enabled

  • 0 in reply to xuefei Yuan
    TI__Mastermind 29715 points

    Hey xuefei,

    What is your PCLK on this system? 

    Let's take a step back and see if we can get internal patgen up and running without DSI input. 
    Here is an example script for 941AS-948 single lane running 720p. You can modify it for your own display timing and run it. You should see colorbars on the display. Please run it and let me know what you see.

    Fullscreen Single_lane_941AS.py Download 
    #Example script for 720p resolution PCLk = 66 Mhz

#VT = '750'
#VA = '720'
#VSW= '5'
#VBackPorch  = '22'
#VFP = '3'
#HT = '1648'
#HA = '1280'
#HFrontPorch = '72'
#HSW = '80'
#HBackPorch = '216'


import time
Ser_addr = 0x18

time.sleep(0.5)
board.WriteI2C(Ser_addr,0x01,0x08) # Reset
board.WriteI2C(Ser_addr,0x01,0x02) # Reset

board.WriteI2C(Ser_addr,0x3,0xDA) #Passthrough I2C

time.sleep(0.5)
board.WriteI2C(Ser_addr,0x5B,0x01) #Force single lane

board.WriteI2C(Ser_addr,0x1E,0x01) #Select FPD-Link III Port 0
board.WriteI2C(Ser_addr,0x66,0x1A)
board.WriteI2C(Ser_addr,0x67,0x01) #M=1
board.WriteI2C(Ser_addr,0x66,0x03)
board.WriteI2C(Ser_addr,0x67,0x03) #N=2

board.WriteI2C(Ser_addr,0x66,0x04)
board.WriteI2C(Ser_addr,0x67,0x70) #least 8 bit of Total Horizontal frame size
board.WriteI2C(Ser_addr,0x66,0x05)
board.WriteI2C(Ser_addr,0x67,0xE6) #Least 4 bit TV + Most 4 bit TH
board.WriteI2C(Ser_addr,0x66,0x06)
board.WriteI2C(Ser_addr,0x67,0x2E) #Most 8 bit of Total Vertical frame size

board.WriteI2C(Ser_addr,0x66,0x07)
board.WriteI2C(Ser_addr,0x67,0x00) #least 8 bit of active Horizontal frame size
board.WriteI2C(Ser_addr,0x66,0x08)
board.WriteI2C(Ser_addr,0x67,0x05) #Least 4 bit AV + Most 4 bit AH
board.WriteI2C(Ser_addr,0x66,0x09)
board.WriteI2C(Ser_addr,0x67,0x2D) #Most 8 bit of active Vertical frame size

board.WriteI2C(Ser_addr,0x66,0x0A)
board.WriteI2C(Ser_addr,0x67,0x50) #Horizontal Sync Width
board.WriteI2C(Ser_addr,0x66,0x0B)
board.WriteI2C(Ser_addr,0x67,0x05) #Vertical Sync Width
board.WriteI2C(Ser_addr,0x66,0x0C)
board.WriteI2C(Ser_addr,0x67,0xD8) #Horizontal back porch
board.WriteI2C(Ser_addr,0x66,0x0D)
board.WriteI2C(Ser_addr,0x67,0x16) #Vertical back porch
board.WriteI2C(Ser_addr,0x65,0x04) #using internal timing and internal clock
board.WriteI2C(Ser_addr,0x64,0x15) #enable PG/color bars


board.WriteI2C(Ser_addr,0x1E,0x01) #Select FPD-Link III Port 0
board.WriteI2C(Ser_addr,0x07,0x58) #0x07,0x58
board.WriteI2C(Ser_addr,0x08,0x5C) #0x08,0x5c
board.WriteI2C(Ser_addr,0x03,0x9A) #0x03,0x9A Enable I2C_PASSTHROUGH, FPD-Link III Port 0

board.WriteI2C(Ser_addr,0x01,0x00) #Release DSI

    Regards,
    Fadi A.

  • 0 in reply to Fadi Abdulhameed
    Prodigy 110 points

    Hi expert,

    Thank you for your help. I modified 0x5b and successfully connected with 948.

    Now I would like to ask you another question. How to make the display show the boot log?

  • 0 in reply to xuefei Yuan
    TI__Mastermind 29715 points

    Hey xuefei,

    What boot logs are you talking about ? Are you just trying to dump the registers of the 948?

    Regards,
    Fadi A.

  • 0 in reply to Fadi Abdulhameed
    Prodigy 110 points
    Fadi Abdulhameed said:
    What boot logs are you talking about ? Are you just trying to dump the registers of the 948?

    I mean that some information will be displayed when the Linux system boots.

    Now my display boots successfully, but I want some information to be displayed on the monitor, which can be a boot log, or something else.

  • 0 in reply to xuefei Yuan
    TI__Mastermind 22946 points

    Hi Xuefei,

    Are you asking me if you want to display PATGEN on the monitor or boot logs? If you want to display boot logs, it would be sent from DSI input.

    Best,

    Josh

  • 0 in reply to Josh Baik
    Prodigy 110 points

    Yes. Could you please show me an example about sending from DSI input?

  • 0 in reply to xuefei Yuan
    TI__Mastermind 22946 points

    Hi Xuefei,

    Please refer to FPD-Link III Modes of Operation section of the datasheet.

    Fadi Abdulhameed said:
    Let's take a step back and see if we can get internal patgen up and running without DSI input. 
    Here is an example script for 941AS-948 single lane running 720p. You can modify it for your own display timing and run it. You should see colorbars on the display. Please run it and let me know what you see.

    As Fadi mentioned, we should first see if we can run the patgen without DSI input. Please refer to the mention above.

    Note that it is recommended to first start with DES PatGen, verify the target timing and no system-level display-side issues, then work back towards SER side by first doing SER PG, then finally end to end from DSI input.

    Best,

    Josh