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DP83822I: Link fail

Part Number: DP83822I

Customer found the LINK is abnormal with DP83822I. 

Here diagram is likely customer system architecture.

Problem description: 

In OUT1 EtherCAT channel, the DP83822/DP83849/KSZ8051/KSZ8081/LAN9252 are Link pass.

In OUT2 EtherCAT channel, the DP83822 is link fail, other PHY as DP83849/KSZ8051/KSZ8081/LAN9252 are Link pass.

There 3 PHYs of VSC8541(x3pcs) in Main EtherCAT Module. 

Pls find the register values with DP83822 LINK fail. 

Out 2 Reg (83822, LINK Fail)

        Read_PHY0_Data[18] uint16_t 0xe600 (Hex)        // False Carrier Counter Half-Full Interrupt: 1 = False Carrier HF interrupt is pending

        Read_PHY0_Data[23] uint16_t 0x4d (Hex)            //RX FIFO Underflow Status: 1 = Underflow detected

Regards

Brian

  • Hi Brian,

    Thank you for sharing the diagram. I would like to ask some question for further clarification:

    • What is the different between OUT1 and OUT2?
    • What is the cable you are using in your system?
    • Where will the DP83822 placed in ESC? The input side of ESC1 or output side of ESC1
    • Are you seeing any CRC errors in the system
    • Could you also read register 0x000A and 0x000B?

    --

    Regards,

    Hillman Lin

  • IN, Out1 and Out2 have the same setting: RGMII, 100Mbps, full duplex, MDIO Type is GMAC, Auto Negotiation is ON, PHY IC is VSC8541

    Cable : CAT.5E

    I have read the 83822 register

    Out 1 Reg (83822) - Connect OK:

            Reg[0]   = 0x3100 (Hex)       

            Reg[1]   = 0x7849 (Hex)       

            Reg[2]   = 0x2000 (Hex)       

            Reg[3]   = 0xa240 (Hex)       

            Reg[4]   = 0x1e1 (Hex) 

            Reg[5]   = 0x0 (Hex)      

            Reg[6]   = 0x6 (Hex)      

            Reg[7]   = 0x2001 (Hex)       

            Reg[8]   = 0x0 (Hex)      

            Reg[9]   = 0x0 (Hex)      

            Reg[10] = 0x100 (Hex) 

            Reg[11] = 0x1000 (Hex)       

            Reg[12] = 0x0 (Hex)      

            Reg[13] = 0x0 (Hex)      

            Reg[14] = 0x0 (Hex)      

            Reg[15] = 0x0 (Hex)      

            Reg[16] = 0x5812 (Hex)       

            Reg[17] = 0x108 (Hex) 

            Reg[18] = 0xe400 (Hex)       

            Reg[19] = 0x2a00 (Hex)       

            Reg[20] = 0x0 (Hex)      

            Reg[21] = 0x0 (Hex)      

            Reg[22] = 0x100 (Hex) 

            Reg[23] = 0x49 (Hex)   

            Reg[24] = 0x400 (Hex) 

            Reg[25] = 0x8020 (Hex)       

            Reg[26] = 0x10 (Hex)   

            Reg[27] = 0x7d (Hex)   

            Reg[28] = 0x5ee (Hex) 

            Reg[29] = 0x0 (Hex)      

            Reg[30] = 0x102 (Hex) 

            Reg[31] = 0x0 (Hex)      

            Reg[32] = 0x3100 (Hex)       

            Reg[33] = 0x7849 (Hex)       

            Reg[34] = 0x2000 (Hex)       

            Reg[35] = 0xa240 (Hex)       

            Reg[36] = 0x1e1 (Hex) 

            Reg[37] = 0x0 (Hex)      

            Reg[38] = 0x4 (Hex)      

            Reg[39] = 0x2001 (Hex)       

            Reg[40] = 0x0 (Hex)      

            Reg[41] = 0x0 (Hex)      

            Reg[42] = 0x100 (Hex) 

            Reg[43] = 0x1000 (Hex)       

            Reg[44] = 0x0 (Hex)      

            Reg[45] = 0x0 (Hex)      

            Reg[46] = 0x0 (Hex)      

            Reg[47] = 0x0 (Hex)      

            Reg[48] = 0x4002 (Hex)       

            Reg[49] = 0x108 (Hex) 

            Reg[50] = 0x0 (Hex)      

            Reg[51] = 0x0 (Hex)      

            Reg[52] = 0x0 (Hex)      

            Reg[53] = 0x0 (Hex)      

            Reg[54] = 0x100 (Hex) 

            Reg[55] = 0x41 (Hex)   

            Reg[56] = 0x400 (Hex) 

            Reg[57] = 0x8020 (Hex)       

            Reg[58] = 0x0 (Hex)      

            Reg[59] = 0x7d (Hex)   

            Reg[60] = 0x5ee (Hex) 

            Reg[61] = 0x0 (Hex)      

            Reg[62] = 0x102 (Hex) 

            Reg[63] = 0x0 (Hex)      

            Reg[64] = 0x3100 (Hex)       

            Reg[65] = 0x7849 (Hex)

     

     

    Out 2 Reg (83822) - Connect Fail:

            Reg[0]   = 0x3100 (Hex)       

            Reg[1]   = 0x7849 (Hex)       

            Reg[2]   = 0x2000 (Hex)       

            Reg[3]   = 0xa240 (Hex)       

            Reg[4]   = 0x1e1 (Hex) 

            Reg[5]   = 0x0 (Hex)      

            Reg[6]   = 0x6 (Hex)      

            Reg[7]   = 0x2001 (Hex)       

            Reg[8]   = 0x0 (Hex)      

            Reg[9]   = 0x0 (Hex)      

            Reg[10] = 0x100 (Hex) 

            Reg[11] = 0x1000 (Hex)       

            Reg[12] = 0x0 (Hex)      

            Reg[13] = 0x0 (Hex)      

            Reg[14] = 0x0 (Hex)      

            Reg[15] = 0x0 (Hex)      

            Reg[16] = 0x5812 (Hex)       

            Reg[17] = 0x108 (Hex) 

            Reg[18] = 0xe600 (Hex)        // False Carrier Counter Half-Full Interrupt: 1 = False Carrier HF interrupt is pending

            Reg[19] = 0x2a00 (Hex)       

            Reg[20] = 0x0 (Hex)      

            Reg[21] = 0x0 (Hex)      

            Reg[22] = 0x100 (Hex) 

            Reg[23] = 0x4d (Hex)            //RX FIFO Underflow Status: 1 = Underflow detected

            Reg[24] = 0x400 (Hex) 

            Reg[25] = 0x8020 (Hex)       

            Reg[26] = 0x10 (Hex)   

            Reg[27] = 0x7d (Hex)   

            Reg[28] = 0x5ee (Hex) 

            Reg[29] = 0x0 (Hex)      

            Reg[30] = 0x102 (Hex) 

            Reg[31] = 0x0 (Hex)      

            Reg[32] = 0x3100 (Hex)       

            Reg[33] = 0x7849 (Hex)       

            Reg[34] = 0x2000 (Hex)       

            Reg[35] = 0xa240 (Hex)       

            Reg[36] = 0x1e1 (Hex) 

            Reg[37] = 0x0 (Hex)      

            Reg[38] = 0x4 (Hex)      

            Reg[39] = 0x2001 (Hex)       

            Reg[40] = 0x0 (Hex)      

            Reg[41] = 0x0 (Hex)      

            Reg[42] = 0x100 (Hex) 

            Reg[43] = 0x1000 (Hex)       

            Reg[44] = 0x0 (Hex)      

            Reg[45] = 0x0 (Hex)      

            Reg[46] = 0x0 (Hex)      

            Reg[47] = 0x0 (Hex)      

            Reg[48] = 0x4002 (Hex)

            Reg[49] = 0x108 (Hex) 

            Reg[50] = 0x0 (Hex)      

            Reg[51] = 0x0 (Hex)      

            Reg[52] = 0x0 (Hex)      

            Reg[53] = 0x0 (Hex)      

            Reg[54] = 0x100 (Hex) 

            Reg[55] = 0x45 (Hex)                    // No Info

            Reg[56] = 0x400 (Hex) 

            Reg[57] = 0x8020 (Hex)       

            Reg[58] = 0x0 (Hex)      

            Reg[59] = 0x7d (Hex)   

            Reg[60] = 0x5ee (Hex) 

            Reg[61] = 0x0 (Hex)      

            Reg[62] = 0x102 (Hex) 

            Reg[63] = 0x0 (Hex)      

            Reg[64] = 0x3100 (Hex)       

            Reg[65] = 0x7849 (Hex)

  • Hi Chen,

    Thank you for sharing the detail description. I may have couple questions on my side that I want to clarify on.

    From OUT1, I see that your register 0x0001[2] you provide are in link down status. That means the PHY is not link up or you are not seeing a link pass in OUT1 which contradict with the statement you made previously.

    • May I ask how did you read the register?
    • Are you reading the register when the EtherCAT is running or when the EtherCAT is off? If possible, could you read the registers when EterCAT is running?
    • Could you also read the register multiple times (mainly 0x0001) and make sure all the registers status stay the same?

    Is it possible on your side to perform the following test above to make sure we are at the same page?

    --

    Thank you,

    Hillman Lin

  • I'm using the OUT1 and OUT2 module running in debug mode, after the EtherCAT connected success or fail, restart the MCU and read the registers.

    I will try to read the registers multiple times when EtheCAT is running,  make sure all the registers status stay the same.

  • Out 1 Reg (83822) - EtherCAT connect OK:

    Reg[0] = 0x3100 (Hex)
    Reg[1] = 0x786d (Hex)
    Reg[2] = 0x2000 (Hex)
    Reg[3] = 0xa240 (Hex)
    Reg[4] = 0x1e1 (Hex)
    Reg[5] = 0x4181 (Hex)
    Reg[6] = 0x5 (Hex)
    Reg[7] = 0x2001 (Hex)
    Reg[8] = 0x0 (Hex)
    Reg[9] = 0x0 (Hex)
    Reg[10] = 0x100 (Hex)
    Reg[11] = 0x1000 (Hex)
    Reg[12] = 0x0 (Hex)
    Reg[13] = 0x0 (Hex)
    Reg[14] = 0x0 (Hex)
    Reg[15] = 0x0 (Hex)
    Reg[16] = 0x4615 (Hex)
    Reg[17] = 0x108 (Hex)
    Reg[18] = 0x0 (Hex)
    Reg[19] = 0x0 (Hex)
    Reg[20] = 0x0 (Hex)
    Reg[21] = 0x0 (Hex)
    Reg[22] = 0x100 (Hex)
    Reg[23] = 0x49 (Hex)
    Reg[24] = 0x400 (Hex)
    Reg[25] = 0x8c20 (Hex)
    Reg[26] = 0x0 (Hex)
    Reg[27] = 0x7d (Hex)
    Reg[28] = 0x5ee (Hex)
    Reg[29] = 0x0 (Hex)
    Reg[30] = 0x102 (Hex)
    Reg[31] = 0x0 (Hex)
    Reg[32] = 0x3100 (Hex)
    Reg[33] = 0x786d (Hex)
    Reg[34] = 0x2000 (Hex)
    Reg[35] = 0xa240 (Hex)
    Reg[36] = 0x1e1 (Hex)
    Reg[37] = 0x4181 (Hex)
    Reg[38] = 0x5 (Hex)
    Reg[39] = 0x2001 (Hex)
    Reg[40] = 0x0 (Hex)
    Reg[41] = 0x0 (Hex)
    Reg[42] = 0x100 (Hex)
    Reg[43] = 0x1000 (Hex)
    Reg[44] = 0x0 (Hex)
    Reg[45] = 0x0 (Hex)
    Reg[46] = 0x0 (Hex)
    Reg[47] = 0x0 (Hex)
    Reg[48] = 0x4615 (Hex)
    Reg[49] = 0x108 (Hex)
    Reg[50] = 0x0 (Hex)
    Reg[51] = 0x0 (Hex)
    Reg[52] = 0x0 (Hex)
    Reg[53] = 0x0 (Hex)
    Reg[54] = 0x100 (Hex)
    Reg[55] = 0x49 (Hex)
    Reg[56] = 0x400 (Hex)
    Reg[57] = 0x8c20 (Hex)
    Reg[58] = 0x0 (Hex)
    Reg[59] = 0x7d (Hex)
    Reg[60] = 0x5ee (Hex)
    Reg[61] = 0x0 (Hex)
    Reg[62] = 0x102 (Hex)
    Reg[63] = 0x0 (Hex)
    Reg[64] = 0x3100 (Hex)
    Reg[65] = 0x786d (Hex)

  • Out 2 Reg (83822) - EtherCAT connect fail:

    I read the registers multiple times, the Reg[16] and Reg[48] are 0x615 or 0x4615.

    Reg[0] = 0x3100 (Hex)
    Reg[1] = 0x786d (Hex)
    Reg[2] = 0x2000 (Hex)
    Reg[3] = 0xa240 (Hex)
    Reg[4] = 0x1e1 (Hex)
    Reg[5] = 0x4181 (Hex)
    Reg[6] = 0x5 (Hex)
    Reg[7] = 0x2001 (Hex)
    Reg[8] = 0x0 (Hex)
    Reg[9] = 0x0 (Hex)
    Reg[10] = 0x100 (Hex)
    Reg[11] = 0x1000 (Hex)
    Reg[12] = 0x0 (Hex)
    Reg[13] = 0x0 (Hex)
    Reg[14] = 0x0 (Hex)
    Reg[15] = 0x0 (Hex)
    Reg[16] = 0x615 (Hex)    or 0x4615, same to Reg[48]
    Reg[17] = 0x108 (Hex)
    Reg[18] = 0x0 (Hex)
    Reg[19] = 0x0 (Hex)
    Reg[20] = 0x0 (Hex)
    Reg[21] = 0x0 (Hex)
    Reg[22] = 0x100 (Hex)
    Reg[23] = 0x49 (Hex)
    Reg[24] = 0x400 (Hex)
    Reg[25] = 0x8c20 (Hex)
    Reg[26] = 0x0 (Hex)
    Reg[27] = 0x7d (Hex)
    Reg[28] = 0x5ee (Hex)
    Reg[29] = 0x0 (Hex)
    Reg[30] = 0x102 (Hex)
    Reg[31] = 0x0 (Hex)
    Reg[32] = 0x3100 (Hex)
    Reg[33] = 0x786d (Hex)
    Reg[34] = 0x2000 (Hex)
    Reg[35] = 0xa240 (Hex)
    Reg[36] = 0x1e1 (Hex)
    Reg[37] = 0x4181 (Hex)
    Reg[38] = 0x5 (Hex)
    Reg[39] = 0x2001 (Hex)
    Reg[40] = 0x0 (Hex)
    Reg[41] = 0x0 (Hex)
    Reg[42] = 0x100 (Hex)
    Reg[43] = 0x1000 (Hex)
    Reg[44] = 0x0 (Hex)
    Reg[45] = 0x0 (Hex)
    Reg[46] = 0x0 (Hex)
    Reg[47] = 0x0 (Hex)
    Reg[48] = 0x615 (Hex)    or 0x4615, same to Reg[16]
    Reg[49] = 0x108 (Hex)
    Reg[50] = 0x0 (Hex)
    Reg[51] = 0x0 (Hex)
    Reg[52] = 0x0 (Hex)
    Reg[53] = 0x0 (Hex)
    Reg[54] = 0x100 (Hex)
    Reg[55] = 0x49 (Hex)
    Reg[56] = 0x400 (Hex)
    Reg[57] = 0x8c20 (Hex)
    Reg[58] = 0x0 (Hex)
    Reg[59] = 0x7d (Hex)
    Reg[60] = 0x5ee (Hex)
    Reg[61] = 0x0 (Hex)
    Reg[62] = 0x102 (Hex)
    Reg[63] = 0x0 (Hex)
    Reg[64] = 0x3100 (Hex)
    Reg[65] = 0x786d (Hex)

  • There is a special phenomenon.

    If I use an EtherNET hub between the Main EtherCAT Module (VSC8541) and Out 2 (DP83822), the EtherCAT connection is successful.

  • Hi Chen,

    I see that the link for 822 for both OUT1 and OUT2 are link up from the register dump you provide above. But I check on register 0x000A register or Reg[10] in your case 0x0100 instead of 0x0102. This indicate that odd nibble detection is not turn off. If possible could you write 0x000A register or Reg[10] to 0x0102 to see if this solve the issue?

    --

    Regards,

    Hillman Lin

  • I write the 0x000A register to 0x0102 and it works.

    Thank you.

  • Hi Chen,

    Glad that it works out.

    --

    Regards,

    Hillman Lin