Hi,
I would like to figure our my problem.
I have LVDS transmitter that promise high speed LVDS rate (2Gbps) only for receiver that has input capacitance <2pF.
the problem that my receiver (FPGA) has input capacitance of ~8pF.
I think to implement your buffer DS25BR100 / DS25BR101 , as I see this buffer has input capacitance 1.2pF so it is ok for my transmitter , but I'm not sure if your buffer can drive good signal (LVDS 2Gbps data, 1GHz clock) to my FPGA.
could you please help me ?
thanks
Sergey