TLK2711-SP: The RKLSB pin provides several '0' pulses (fails) when PRBSEN and LOOPEN are enabled at the same time (BIST)

Hi Juan,

Can you confirm you are following this power-on reset sequence? I'm thinking it might be possible the output on RKLSB might be strange because it's still in a high impedance state.

I attempted to reproduce your results using a TLK1501 EVM (a similar PN) but I did not see the same result. Regardless of which order I asserted PRBSEN and LOOPEN, the PRBS_PASS pin remained high and did not report any PRBS errors (this pin is equivalent to RKLSB on the TLK2711-SP).

Assuming you are meeting the power-on reset sequence requirement, can you share more details about your setup? I would like to try reproducing your results with a setup as similar to yours as possible. Specifically,

• What GTX_CLK frequency and amplitude are you using?
• Is TESTEN tied low or is it unconnected?
• Is there any specific order in which you power the chip, provide GTX_CLK, assert ENABLE, assert LCKREFN, assert PRBSEN, and assert LOOPEN? Or are these all asserted at the same time as power up?

An additional test you can try: do you see the same result if you externally connect DOUTTXP/N to DINRXP/N instead of using the internal loopback feature?

Best,

Lucas

Hi Lucas!!

First of all, thanks a lot for your prompt reply!   I really apreciate it

After reviewing your notes, I believe there might be a "power-on sequence violation" here. I not only actived the PRBS and LOOPEN functions at the same time in the first capture, but I also executed an ENABLE command to the TLK. This explains why no PRBS erros are shown for the second scenario. Just to learn more about this P/N...why do I see '1' and '0' sequences in a high-impedance output?

Let me provide you more setup info as far as I can:

• GTX_CLK frequency: 100MHz @ 3V3
• TESTEN pin is tied low with a 0R
• There are two different power-on sequences (fortunately, we can set any order by the main controller unit) 
  • Power supply (2V5) and GTX_CLK ⇒ ENABLE - LOOPEN - PRBS -PRE (maybe wrong)
  • Power supply (2V5) and GTX_CLK ⇒ ENABLE - PRE - PRBS ⇒ LOOPEN

TLK to TLK PRBS (BER) tests have been performed as well, and we didn't see any error in any case.

Thank you for your technical support, Lucas.

Regards!

Hi Juan,

Juan VarGz said:

Just to learn more about this P/N...why do I see '1' and '0' sequences in a high-impedance output?

You're correct that a sequence of '1's and '0's shouldn't be expected from a high-impedance output. It's possible that the RKLSB pin's behavior is undefined in this state, or it's possible that the output looks like this for an entirely different reason.

I noticed in the first waveform you share that the RKLSB signal transitions through a few different types of output. First it remains low, then switches between high and low many times, then remains low again, and finally remains high. Are you making any changes to LOOPEN or any other pins that could coincide with the RKLSB output changing?

I attempted to reproduce your results matching your setup as close as I could with the TLK1501 EVM but I still did not see the same result as you. The PRBS_PASS pin consistently stayed high when both PRBSEN and LOOPEN were enabled.

I would be interested to know if you see a similar output in the following situations, if you are able to test them:

• Power-on reset sequence is met correctly
• DOUTTXP/N pins are externally connected to DINRXP/N pins and the LOOPEN pin is deasserted.

Best,

Lucas