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Hello Daniel,

Theoretically it is possible, but it will be very very hard to get the correct timing without using a graphics controller.

Are you sending the VSYNC, HSYNC and ENABLE? These signals have to be sincronized within the data.

Find attached an implementation document.

6763.FlatLink Data Transmission System with 83B, 82, 86A.pdf

Regards.

ELIAS VILLEGAS said:

Hello Daniel,

Theoretically it is possible, but it will be very very hard to get the correct timing without using a graphics controller.

Are you sending the VSYNC, HSYNC and ENABLE? These signals have to be sincronized within the data.

Find attached an implementation document.

6763.FlatLink Data Transmission System with 83B, 82, 86A.pdf

Regards.

Sir,

Thank you for the reply.  I am currently tying the VSYNC, HSYNC, and ENABLE lines high as was shown in the test pattern on the datasheet.  Instead of the test pattern however, I simply want to display a single solid color of R, G, or B, and am trying to do so by tying all the R data bits high.  Is this possible, or do I need properly timed VSYNC, HSYNC and ENABLE signals too?

Hi Daniel,

an LCD requires hsync/vsync toggles in order to draw a solid color on the screen.

Regards.

Hello Daniel,

Data for each LCD row is transmitted, from left to right, followed by Hsync transitioning.  That transition tells the LCD to start a new row.  The Hsync rate is typically tens of kHz.  And a Vsync transition restarts the whole frame draw.  I don't know of a way to control this manually without a GPU.

Thanks,
RE

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Hi Daniel,

That's correct that the grayscale test pattern shown isn't capable of producing an image on an LCD.  The pattern's purpose is for power measurements.  And it makes sense for Hsync and Vsync to be static for the power measurement, since they are static >99% of the time during normal operation.  The same grayscale pattern is shown in some TI competitor datasheets.

It would also be hard for the document to describe how Hsync and Vsync should toggle, for producing an image on an LCD.  That timing varies based on a particular display's resolution, refresh rate, and blanking interval allowance.

The LVDS83B simply serializes the parallel data it receives.  It's feasible that a microcontroller could control that parallel data, to properly control Hsync and Vsync.

Another idea, for obtaining an RGB source along with Hsync/Vsync, is to use an OMAP platform.  I'm not totally knowledgeable on them, but you could look into the PandaBoard or BeagleBoard.  We of course have E2E support forums for them.

Thanks,
RE