Other Parts Discussed in Thread: TCA9534, TCA9517
I am designing a revision to an existing system where the client is interested to segment the current pcb into multiple pcb's for mechanical assembly purposes. This will most likely press the performance requirements of the i2c bus outside of the 400pF capacitance spec. At minimum, it puts it out of our control since i2c nodes will be off of the main board.
So I think the solution is a bus extender, P82B715. Looks like a great chip. I would love some input to see that this design modification is in the right neighborhood and being used correctly.
There is a main pcb with [1] p82b15 going out to [3] to [5] expansion nodes, each with a p82b15. Each expansion node is pretty simple, it uses a TCA9534 expansion gpio chip to control some outputs to N-Channel FET's. I have place a single pull up on each output (Lx and Ly) that splits the difference between the calculation for 3 expansion nodes and 5 expansion nodes- at assembly, we do not know how many expansion i2c nodes the end client will put in the final system. Not sure if I should be concerned with that.
This is the i2c master with the p82b715. it's showing 3.3k pull up for the bus extender:
This is the i2c slave node. there can be 2-5 of them.
Cable is unknown, but most likely 22 awg stranded industrial type in a jacketed cable. I think a twisted pair for the i2c would be good (for noise) and bad (for added capacitance). max cable length to extend to all i2c bus nodes would be 1 meter- though I expect the end client to abuse that.
So is this an approach that can address the risk? if its not, then a change to rs485 may be necessary, which amplifies code modification (undesirable).
Can a single value pull up on the bus be used? I am assuming the normal i2c pull ups are still required at each node on the output of the bus extender.
bus resistor calc:
