DS90UB940N-Q1: Any way to check the incoming VS, DE signal?

Hello,

Could you possibly clarify on what you are experiencing? Is it only a delay between video and audio, but a constant video stream is still achieved? Or is there also a complete lack of video output from the DES at times? I am asking because you mentioned that "LOCK pin was LOW during the lack of video output." The LOCK signal indicates that the deserializer is able to identify the forward channel FPD-Link signal from the serializer (what SER is being used in this system?). If the LOCK pin is toggling, that means that the deserializer has a weak/intermittent link with the remote SER which could be related to the serializer hardware, deserializer hardware, or the cable in-between the two. 

Wai-Eu Loke said:

My question is, without access to the serializer (video source) side, is there a way to check the timings of the VS and DE signal within the 940N deserializer?

Yes, the 940N has a built-in feature that is capable of detecting incoming video parameters. Please see Section 7.4.4 - Input Display Timing of the DS90UB940N data sheet for more information.

Wai-Eu Loke said:

Also since the PASS pin is flagged, is it right to say that the problem lies on the FPD-Link interface (input) and not on the CSI interface (output)?

Are you operating in normal mode or BIST mode?

Best,

Nikolas

Hello Nikolas,

The SER used is DS90UB925Q.

The symptom are as follows:

1. Initially there will be a black screen + audio output (expectation is to have both audio/video to output at the same time)

2. After some time (anywhere from ~10sec to ~120sec), video will output and a constant stream is achieved (issue does not happen anymore)

When symptom in step (1) is happening, LOCK is unstable and will continue toggling between HIGH and LOW, same with the PASS signal. It is operating in normal mode, not BIST.

Nikolas Antonucci said:

Yes, the 940N has a built-in feature that is capable of detecting incoming video parameters. Please see Section 7.4.4 - Input Display Timing of the DS90UB940N data sheet for more information.

Since this is a built-in feature, is there any way that I can probe and check the received VS, DE signals? (Like routing it to a GPIO etc.). Also, is my assumption correct that when LOCK is lost/PASS is low, CSI DPHY will not output from the DES side?

Hello,

Could you please perform the following preliminary hardware checks?

• Could you please verify to me what modes and IDX straps are being utilized on both the SER and DES? Both devices need to be strapped to the same target I2C addresses and FPD-Link modes for IDX and MODE_SELs, respectively.
• What cable connections are being utilized to connect the 925 to the 940N?

In addition, please run the pattern generator on the DES and then the SER. Are you able to see the fixed patterns in both instances?

Wai-Eu Loke said:

2. After some time (anywhere from ~10sec to ~120sec), video will output and a constant stream is achieved (issue does not happen anymore)

Once this point is reached, do both LOCK and PASS go HIGH?

Wai-Eu Loke said:

When symptom in step (1) is happening, LOCK is unstable and will continue toggling between HIGH and LOW, same with the PASS signal. It is operating in normal mode, not BIST.

Since we are operating in normal mode and PASS is returning LOW, the issue most likely lies within either the SER or the video source. We can further debug this matter once the information requested above is provided.

Wai-Eu Loke said:

Also, is my assumption correct that when LOCK is lost/PASS is low, CSI DPHY will not output from the DES side?

Yes, that is correct. LOCK verifies that link has been successfully established between SER and DES, so LOCK is required to be HIGH in order for any video output to be received from the DES. 

Wai-Eu Loke said:

Since this is a built-in feature, is there any way that I can probe and check the received VS, DE signals? (Like routing it to a GPIO etc.).

The 940N does not have such functions. 

Best,

Nikolas