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TCA9548A: TCA9548APWR Master Interface Signal Issue

Matt Qi
Intellectual 2600 points
Part Number: TCA9548A

Hi 

My customer faced a master interface signal issue, which can be described as following:

When TCA9548 connects to the master end I2C waveform write operation, it is found that there is a back channel on the falling edge of SCL/SDA (the test point is close to the chip end, the back channel occurs at 0.3VCC~0.7VCC, and the duration is about 1.416ns, see the attached waveform for details). This problem was not found when measuring the 8 I2C Slave terminals of TCA9548.

Please help confirm whether this problem is risky, and can you give any recommendation to avoid this issue?

  • 0
    TI__Guru 59980 points

    Hi Matt,

    Matt Qi said:
    Please help confirm whether this problem is risky, and can you give any recommendation to avoid this issue?

    No this is not risky. This is part of how a pass FET device like TCA9548A works. If you have fast edges (like the falling edge in I2C) then you could see this kind of step when you zoom into the nanosecond range. The step occurs at the Vgate-Vth value. For our switches, Vth is around 1.2V~1.5V and the Vgate is Vcc. This is essentially the pass FET switching from the cut off region of operation to the linear region of operation.

    This doesn't look like it's causing any signal integrity issues and I can't recall of a customer stating this was a root cause of failure. The I2C standard states that all I2C devices need to have a 50-ns deglitch filter, so this small hang time we see is usually much shorter than 50-ns. 

    -Bobby