Other Parts Discussed in Thread: SN65DSI86, SN65DSI83
Hi TI,
I have a question about pixel clock in SN65DSI86.
I want to input 16.5MHz as the pixel clock and output 8.25MHz. Is this possible?
If possible, where should I set it?
Thank you.
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Hi TI,
I have a question about pixel clock in SN65DSI86.
I want to input 16.5MHz as the pixel clock and output 8.25MHz. Is this possible?
If possible, where should I set it?
Thank you.
Hi,
Please see section 8.3.3.1 GPIO REFCLK and DSIA Clock Selection of the DSI86 datasheet for the DSI86 input clock selection and requirement. The DSI86 output is eDP or DP, so there is no dedicated pixel clock, pixel clock is embedded within the data.
Besides DSI86, would DSI83/84/85 fit your requirement?
Thanks
David
Hi David,
Thank you reply quickly.
I asked this question thinking that it would be possible to change the pixel clock frequency embedded in the data using PLL etc.
However, since it doesn't seem possible, I'll withdraw this question.
Thank you for introducing SN65DSI83/84/85.
Unfortunately, the device specifications on the receiving side are DP, so I think SN65DSI86 is the best option.
Thank you.