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DP83TC812R-Q1: Testing TDR procedure DP83TC812R-Q1

Part Number: DP83TC812R-Q1

Hello Team,

I'd like to confirm about following points to do TDR test referring SLNA389a.

  1. Does following indirect access procedure correct?
    There is some example for Read regarding indirect access but I couldn't found example for Write.
    Write 0x8001 to register 0x1834
    1. Write 0x1 to address 0xD
    2. Write 0x0834 to address 0xE
    3. Write 0x8001 to address 0xD
  2. Regarding testing TDR step 2, does this step mean we need change register setting based on [REGISTER READ/WRITE]? or it already applied at step for all registers?
  3. Could you tell me how to select SQI setting according to the result of bit error rate?
    We think there is 0 to 7 SQI setting and we need to select appropriate SQI setting regarding bit error rate.
    We'd like to know about how to select appropriate  SQI.

Best regards,
Kazuki Kuramochi

  • Hi Kazuki,

    1. Here are the steps to perform extended register write:

    To write 0x8001 to register 0x1834, the procedure would be as follows:

    0x000D = 0x0001
    0x000E = 0x0834
    0x000D = 0x4001
    0x000E = 0x8001

    2. For TDR step 2, these register need to be written as shown. They are not already applied.

    3. Please see the following mapping of SQI to link quality. SQI of 4 or above is considered good quality. 

    Thanks,

    David