DS90UB941AS-Q1: How does 947 perform 7-bit sampling when 1 lane corresponds to 7 bits of data in a clock cycle of LVDS

Hi Ray,

The OpenLDI interface uses the CLK input to read the cycle of 7 bits for each LVDS data input. This is shown in "Figure 7. Single OpenLDI Checkerboard Data Pattern" in the 947 datasheet.

Regards,
Ikram