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DS90CF384: Sample the 24-Bit TTL Data at the Rising Edge of the Clock or Falling Edge of the RXCLKOUT (Pin#26)

Part Number: DS90CF384
Other Parts Discussed in Thread: DS90C383,

Greetings,

This is Tanveer Ahmed, from TATA Advanced Systems, Bangalore, India.

I am using DS90CF384MTD/NOPB (TSSOP-56) in my design for converting LVDS to 24-Bit TTL Logic.

I want the data should be sampled at rising edge, or change it to falling edge.

How can I change this data sample from falling edge of clock to rising edge of clock or vice-versa?

In the datasheet Page#11, I can see data being sampled at either positive or negative edge of the clock.

Kindly suggest at the earliest.

Thank you,