DS250DF230EVM: A problem of PRBS testing with DS250DF230EVM

lou.jichen

Part Number: DS250DF230EVM
Other Parts Discussed in Thread: DS250DF230

Hi, I'm using the DS250DF230EVM and the SigCon Architect software to evaluate DS250DF230. In order to use the PRBS Gen/Checker on the software,

I should input a signal to the retimer's RX, my question is if I want to get a 10Gpbs pattern, what's the minimum sub-rate allowed at the input?

For example, if a 500M clock signal input to the RX, can a 10.3125 Gbps PRBS signal will be generated?

Thanks,

Jochen

over 1 year ago

0 Drew Miller1 over 1 year ago

TI__Mastermind 23707 points

Hi Jochen,

We have often used 1.2890625 GHz clock in order to generate 10.3125 Gbps PRBS pattern. I have not tried a 644.53125 MHz clock input. Do you have the ability to try a 1.2890625 GHz clock input?

Thanks,

Drew

0 lou.jichen over 1 year ago in reply to Drew Miller1

Prodigy 40 points

Hi Drew,

Now I don't have a 1.28GHz clock，so I want to know the minimum allowable sub-rate, such as 10.3125/10 Gbps or 10.3125/20 Gbps?

Thanks,

Jochen

0 Drew Miller1 over 1 year ago in reply to lou.jichen

TI__Mastermind 23707 points

Hi Jochen,

I can try a couple lower subrates this week and see where CDR lock breaks.

Thanks,

Drew

+1 Drew Miller1 over 1 year ago in reply to Drew Miller1

TI__Mastermind 23707 points

Hi Jochen,

Thanks for your patience on this. I observed that the retimer maintained CDR lock while outputting PRBS down to a clock of 25.78125 GHz / 64, but observed high output jitter. Jitter was much better at 25.78125 GHz / 32, so I would not recommend a subrate clock lower than div 32.

For 10.3125 Gbps, I observed 10.3125 GHz / 16 and 10.3125 GHz / 32 both worked, but div 16 had less jitter.

Thanks,

Drew

0 lou.jichen over 1 year ago in reply to Drew Miller1

Prodigy 40 points

Hi Drew,

Thanks for your reply, you solved my confusion.

Thanks,

Jochen

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DS250DF230EVM: A problem of PRBS testing with DS250DF230EVM