• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Answers 1 answer
  • Subscribers 33 subscribers
  • Views 298 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN65DPHY440SS: Swapping of data lanes

balaji s
Prodigy 20 points
Part Number: SN65DPHY440SS

Hi TI Team,

We are using SN65DPHY440SS re-timer part for an internal design and we face an issue with respect to routing aspects from re-timer IC to the sink connector. Swapping of data lanes at the re-timer IC end would resolve our issue.

Is there a possibility to swap the data lanes 0 & 1 with lanes 3 & 2 respectively ? If done so, will there be any issues on the software aspects?

  • 0
    TI__Guru**** 176371 points

    Hi,

    Is this a MIPI CSI or DSI application? 

    CSI-2 does not have a back channel path. Because of this, there is no requirement on lane ordering. Because there is no lane ordering requirement, there are more combinations which can be implemented. All possible combinations are supported by the DPHY440 as long as the same lane order is maintained between the DPHY440 input and the output.

    Please note that for all CSI-2 implementations, the polarity must be maintained between the CSI-2 Source and CSI-2 Sink. The DPHY440 does not support polarity inversion.

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Prodigy 20 points

    Hi David,

    Thanks for your quick response. 

    We are using MIPI CSI2 application.

    Sure, we will maintain the same lane ordering and polarity on both input and output of the DPHY to ease the routing.

    Thanks!!

    Balaji S