• State
  • Locked Locked
  • Replies 2 replies
  • Subscribers 34 subscribers
  • Views 1073 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TCAN4550-Q1: CAN BUS : No buffer space available

Alan Wu
Prodigy 10 points
Part Number: TCAN4550-Q1
Other Parts Discussed in Thread: TCAN4550

I am running two tcan4550 chips on spi0, spi3 of RK3568.
if I send the messages to fast.(1 ms)
This runs for a while, then suddenly write to the socket return write: No buffer space available.
This state remains until if down / if up can interface.
How do I fix this?
Thanks.

  • 0
    TI__Guru 73331 points

    Hi Alan,

    I've assigned this to one of our experts. Please allow us some time to get to this since this is thankgiving week, I expect he will get back to you by next week.

    -Bobby

  • 0
    TI__Mastermind 33200 points

    Hi Alan,

    It is not clear to me if you are only trying to send messages from the two TCAN4550 chips, or if you are trying to both transmit and receive the CAN messages between the two chips, or from other CAN transceivers on a larger bus.

    All communication with the TCAN4550 is done through the SPI interface, so the limiting factor on how fast you can send or receive CAN messages is dependent on how fast and efficient the SPI communication is.  When you send and receive CAN messages, there overall time needed to read and write the registers to determine the TX and RX Buffer to be used, then write or read the message contents from the MRAM, and then send or acknowledge the message can take longer than the CAN message takes to transmit itself.  Therefore, you should determine the amount of time needed to transmit or receive a message based on the SPI communication to determine the minimum delay needed between CAN messages to avoid running out of buffer space.

    Some options to consider are:

    - Monitor the RX and TX FIFO/Buffer fill status to determine if you are approaching a FULL condition.

    - Increase the number of buffers allocated.  This will not prevent an overrun condition if you are sending messages faster than they can be processed, but it may allow some extra buffer space and time before an overflow.

    - Increase the SPI data rate to the maximum level that can be reliably supported.  The TCAN4550's max SPI frequency is 18MHz.

    - Use SPI Burst Mode for multi-word transmissions by sending multiple data words in a single SPI transaction and setting the Length field of the SPI header word accordingly.  This will reduce the repeated SPI header words that include the address and read/write Op Code for every consecutive MRAM address location and reduce the overall time needed to write/read a CAN message from the MRAM buffers.

    - If the CAN messages are trying to transmit to other nodes on a CAN bus and not to themselves, make sure they are being successfully transmitted before sending a new message to ensure there is TX FIFO/Buffer space available for new messages.  The messages may not have won arbitration and may still be awaiting transmission on the bus.  If you try to send more messages than you have TX buffers, you will get an error stating no space is available.

    Regards,

    Jonathan