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DS90UB925Q-Q1: Lock Pin

Vijay Balaji
Prodigy 130 points
Part Number: DS90UB925Q-Q1
Other Parts Discussed in Thread: ALP

Hi,

I am using DS90UB925 and DS90UB926 for my circuit.

Once I connect my PCLK(28.7 MHz) to the serializer, the LOCK pin in Deserializer is getting low.

Jitter tolerance is also within the limit.

Can you suggest any solution for this.

Is there any registers setting to be done in serializer and deserializer?

  • 0
    TI__Mastermind 22946 points

    Hi Vijay,

    The information shared is too comprehensive to know. Could you give more information to figure out the issue? Are you trying with using ALP through EVMs? If it is using with own design, please provide the schematic to review. In the meantime, please see the Device Functional Modes section of the datasheet. Make sure that PDB is active for LOCK high

    Best,

    Josh