DP83849I: PHY0 power down - Schematic review

Hi Bitesh,

I would like to confirm on my understanding on your current issue, Are you saying that your DP83849PHY is currently on normal operation but register 0x0000 read in power down mode. If so, how can you determine the DP83849PHY is in power down mode? Are you see a link up when you are seeing register 0x0000 is reading 3900?

Regarding to the pull up pins, if you want to configure DP83849 into different strap mode. Pull up resistor may be required depend on your mode of operation.

--

Thank you,

Hillman Lin

Hi,

    It is a Dual port PHY. If you refer the schematic We have given Physical address 0 to PORT A and  Physical address 1 to PORT B.

Now when we read the Base Mode control register ( ADDR 00h) Table 5-16 in datasheet we are getting different values for Phy 0 (PORT A) and Phy 1 (PORT B).

for PHY 0 it is 0x3900. If I convert 0x3900 to binary bit 11 is '1' which indicates POWER DOWN.

However for PHY 1 contents of address 00h is 0x3100 in which bit 11 is 0. 

So we are not able to understand why Phy0 is in Power Down mode.

Link is down for both the ports. We suspect since Phy0 is in Power down it is making link of Phy 1 also down.

Can you please verify our schematic is correct and in Hardware three is no error ?

Also if you can suggest what we can try to fix the problem ?

Regards,

Bitesh 

Hi Bitesh,

Thank you for the detail update. Are you able to get a link up if you program the PHY0 our of Power down mode?

If possible, could you also probe the following pins to see if there is any trigger event going on in this two pins during power up?

--

Thank you,

Hillman Lin

Hi,

    Both the pins, POWERDOWN_INTA and POWERDOWN_INTB are 3.3V. after Power on I get following log

$ mdio 2188000.ethernet-1 phy 0 raw 0x0

0x3900

$ mdio 2188000.ethernet-1 phy 1 raw 0x0

0x3100

$ mdio 2188000.ethernet-1 phy 0 raw 0x10

0x0000

$ mdio 2188000.ethernet-1 phy 1 raw 0x10

0x4000

After I force the bit 11 to 0 in Phy 0 using following command 

$ mdio 2188000.ethernet-1 phy 0 raw 0x0 0x3100/0x3100

I'm getting following log after forcing the bit 11 to 0 for Phy 0

$ mdio 2188000.ethernet-1 phy 0 raw 0x0

0x3100

$ mdio 2188000.ethernet-1 phy 1 raw 0x0

0x3100

$ mdio 2188000.ethernet-1 phy 0 raw 0x10

0x4000

$ mdio 2188000.ethernet-1 phy 1 raw 0x10

0x4177

as you can see in above log 0x4177 means link bit is up for Phy 1 but not for Phy 0

Can you help to make Phy 0 also up ? 

Details of my system is as follows -

We are using Linux LTS-v6.1.58
PHY driver: drivers/net/phy/dp83848.c
Switch driver: drivers/net/dsa/sja1105/sja1105_main.c
DTS: https://gist.github.com/openedev/c3138fdbf62a08c1d2772153320badca

In my custom board after boot I'm seeing following logs 

[   25.988767] sja1105 spi1.0: configuring for fixed/mii link mode
[   25.988767] sja1105 spi1.0: Link is Up - 100Mbps/Full - flow control off
[   26.077023] sja1105 spi1.0 ethphy0 (uninitialized): PHY [2188000.ethernet-1:00] driver [TI DP83848C 10/100 Mbps PHY] (irq=POLL)
[   26.236560] sja1105 spi1.0 ethphy1 (uninitialized): PHY [2188000.ethernet-1:01] driver [TI DP83848C 10/100 Mbps PHY] (irq=POLL)
[   26.328395] device eth0 entered promiscuous mode
[   26.346597] DSA: tree 0 setup
[   27.833315] Bluetooth: BNEP (Ethernet Emulation) ver 1.3
[   27.876500] Bluetooth: BNEP socket layer initialized
[   27.948185] Generic PHY fixed-0:00: attached PHY driver (mii_bus:phy_addr=fixed-0:00, irq=POLL)
[   27.998415] fec 2188000.ethernet eth0: Link is Up - 100Mbps/Full - flow control off
[   28.044148] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready

eth0      Link encap:Ethernet  HWaddr DA:FE:90:09:B4:32  
          inet6 addr: fe80::d8fe:90ff:fe09:b432/64 Scope:Link
          UP BROADCAST RUNNING MULTICAST  MTU:1504  Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:0 (0.0 B)  TX bytes:0 (0.0 B)

ethphy0   Link encap:Ethernet  HWaddr DA:FE:90:09:B4:32  
          UP BROADCAST MULTICAST  MTU:1500  Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:0 (0.0 B)  TX bytes:0 (0.0 B)

ethphy1   Link encap:Ethernet  HWaddr DA:FE:90:09:B4:32  
          BROADCAST MULTICAST  MTU:1500  Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:0 (0.0 B)  TX bytes:0 (0.0 B)

Can you let us know if any driver settings we need to modify as we are using DP83849I part( Dual port Phy) whereas driver is for DP83848 ? I did not get driver from TI for DP83849.

Also please let me know if you find any problem in hardware schematic ,attached previously. 

Regards,

Bitesh

Hi hillman lin ,

                                                Also I'm getting following log when I'm giving commad to phy0 up

command - ip link set dev ethphy0 up

log as follows - 

[  300.177226] sja1105 spi1.0 ethphy0: configuring for phy/mii link mode

[  300.189393] ------------[ cut here ]------------

[  300.194335] WARNING: CPU: 0 PID: 318 at drivers/net/phy/phy.c:1157 phy_st4

[  300.202506] called from state NOLINK

[  300.206101] Modules linked in: bnep tag_sja1105 sja1105 pcs_xpcs brcmfmacg

[  300.217606] CPU: 0 PID: 318 Comm: ip Not tainted 6.1.58 #1                

[  300.223110] Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)    

[  300.229653]  unwind_backtrace from show_stack+0x10/0x14                  

[  300.234911]  show_stack from dump_stack_lvl+0x58/0x70                    

[  300.239990]  dump_stack_lvl from __warn+0x70/0x1a4                        

[  300.244808]  __warn from warn_slowpath_fmt+0x1bc/0x270                    

[  300.249965]  warn_slowpath_fmt from phy_start+0x58/0xb4                  

[  300.255211]  phy_start from dsa_port_enable_rt+0x54/0x9c                  

[  300.260547]  dsa_port_enable_rt from dsa_slave_open+0xb8/0x17c            

[  300.266406]  dsa_slave_open from __dev_open+0xec/0x1ac                    

[  300.271570]  __dev_open from __dev_change_flags+0x18c/0x224              

[  300.277158]  __dev_change_flags from dev_change_flags+0x14/0x44          

[  300.283094]  dev_change_flags from do_setlink+0x254/0xe4c                

[  300.288517]  do_setlink from rtnl_newlink+0x598/0x80c                    

[  300.293593]  rtnl_newlink from rtnetlink_rcv_msg+0x168/0x574              

[  300.299268]  rtnetlink_rcv_msg from netlink_rcv_skb+0xb8/0x11c            

[  300.305119]  netlink_rcv_skb from netlink_unicast+0x1a8/0x2dc            

[  300.310891]  netlink_unicast from netlink_sendmsg+0x1d8/0x450            

[  300.316666]  netlink_sendmsg from ____sys_sendmsg+0x188/0x258            

[  300.322439]  ____sys_sendmsg from ___sys_sendmsg+0x6c/0xa4                

[  300.327947]  ___sys_sendmsg from sys_sendmsg+0x50/0x98                    

[  300.333107]  sys_sendmsg from ret_fast_syscall+0x0/0x1c                  

[  300.338352] Exception stack(0xf10b9fa8 to 0xf10b9ff0)                    

[  300.343418] 9fa0:                   00000000 00000001 00000003 bedbe740 00

[  300.351608] 9fc0: 00000000 00000001 b6fb05a0 00000128 65732949 00000000 00

[  300.359796] 9fe0: 00000128 bedbe6e0 b6eaf6d3 b6e21ae6                    

[  300.364928] irq event stamp: 3223                                        

[  300.368263] hardirqs last  enabled at (3231): [<c0195dbc>] __up_console_s0

[  300.376182] hardirqs last disabled at (3240): [<c0195da8>] __up_console_s0

[  300.384094] softirqs last  enabled at (3126): [<c01017d0>] __do_softirq+0c

[  300.391832] softirqs last disabled at (3079): [<c012f204>] __irq_exit_rcuc

[  300.399748] ---[ end trace 0000000000000000 ]---  

Regards,

Bitesh

Hi Bitesh,

I am not sure if I understand correctly. After writing bit[11] and bit[10] of register 0x0000 to 0, you are able to see PHY1 linking up properly and PHY0 is still not able to link up properly?

If so, could you send me the register dump between PHY0 and PHY1 from 0x0000 to 0x001F? We want to compare the status between the two.

May I also ask what is the link partner between PHY0 and PHY1?

--

Regards,

Hillman Lin

Hi,

    Please find the contents of registers. Let me know if you get any solution.

Regards,

Bitesh

Hi Bitesh,

Based on your register dump, PHY0 is not linking up as well. Did you read mutiple time on both PHY0 and PHY1 to make sure the register is not latch into the previous stagfe?

--

Thank you,

Hillman Lin

Hi,

   I am directly using DP83848 driver for DP83849 part. I'm enable 2 ports in device tree. Is this approach correct ?

Please let me know what corrections to make if I want to use dual port Phy from DP83848 part driver .

Regards,

Bitesh 

Hi Bitesh,

Right now we don't have the necessary hardware to test the driver. I'm not sure how the 848 driver initialization will handle the dual port function.

At the moment we cannot support this query.

Regards,

Hillman Lin