DS90LV804: failed to use 1.8V to control the LVDS buffer because internal termination.

wang shu said:

is there any way that i can improve to make the DS90LV804 work well with that method?

The 100 ohm resistor is going to shift up the Vref signal when you output a HIGH on the non inverting signal. I'm not sure what the VoH level will be on the single ended output but if it swings to 1.8V (I'm assiming the LVDS driver is very strong and it's effective output resistance is 0) and you have a 200 ohm resistor on 'R2' (in reference to that app note), the voltage on Vref would likely be above 2/3 of the 1.8V signal or 1.2V during the HIGH logic. I used a simple simulation tool to showcase this in a DC sense:

This shows us an estimate of around 1.35V on Vref during a logic high.

If the non-inverting pin in this case needs to drive above 1.35V by atleast 100mV to send a logic HIGH on the cable end of the LVDS buffer. 

From DS90LV804's datasheet, it appears to be a type 1 receiver where VTH is 100mV and VTL is -100mV. So the LVDS driver needs to drive to about 1.45V to drive logic highs effectively. (You ideally want more room for margin but 1.45V is the number you should target on the non-inverting side).

For a logic low, the Vref voltage shifts to the following (assuming the single ended driver is very strong with almost no resistance on it's output):

You can see that Vref here shifted quite massively to 450mV. This means that your single ended driver needs to be able to output atleast 350mV on the noninverting receiver pin. (You ideally want more margin but 350mV is the absolute number you want to ensure). 

This means that your LVDS driver must drive above 1.45V and below 0.35V to be able to make this set up work properly. 

I tried to play around with the resistor divider but it seems like changing the pull up on the noninverting side makes the low logic much harder to achieve (Vref with a 500 ohm pull up gives Vref at 211mV... during a logic LOW). And modifying the pull down resistor made it harder to achieve VoH levels as well. 

Placing any resistance between the noninverting receiver pin and the LVDS driver would work against us, I wouldn't suggest it since it would make the VoL/VoH levels worse from the output side going into the input.

For improvement, Maybe adding a ~100 ohm resistor from the inverting pin and the Vref point would be better. A 100 ohm resistor there would provide Vref to be 600mV and 1.2V for low and high references repectively. I think this would affect the transition time of Vref though. I'm not sure about the impact of this from the system level....

wang shu said:

Do I need to change 10nF capacitor to larger one or remove it?

In the original app note, the 10nF capacitor was used to try to keep the voltage at the inverting pin stable (incase of noise or electrical coupling into the pin). When larger resistors are used (like in the app note where the range was measured in kilo-ohms) the reference voltage on the inverting pin is more susceptible to noise, so using a 10nF cap helps a lot more here. In your current design with 200 ohms, the resistor is smaller (stronger) so the 10nF cap isn't as effective as the case where the resistors are something like 10k. 

Because the device you are using has a termination resistance of 100 ohms between the two inputs, the capacitator will slow down your communication (you now have to charge/discharge the capacitor through the 100 ohm resistor when you transition from low to high or high to low on the single ended output. Making it smaller would help speed up these transitions but may cause some more signal ringing because the faster transitions. 

Summary: you can likely make the capacitor smaller to speed up the data rate. I would probably experiment without it first and verify on the scope of the two input signals are ringing, if they are then it would make sense to use a capacitor but modify the value. 10nF here is likely not needed, may be able to get away with 1nF or 100pF.

wang shu said:

some GND and VDD pins of DS90LV804 are NC pins in DS15BR401. i checked several discussion in E2E form. one show that the NC pins connect noting in DS15BR401, It can replace the DS90LV804 directly. one show that NC pins are used for testing, it cannot replace the DS90LV804 directly. Could you clarify it again, which one make sense?

I went and found an old mount bond diagram of the 32 pin QFN package for the DS15BR401, All of the N/C pins (1, 17, 18, 19, 22, 23, and 24) were all not connected to the actual die of the device. (No electrical connection). From this I believe they should be pin to pin swappable. 

Overall summary: it looks like you could make this work if the signals aren't swinging too wildly (hopefully you minimize any inductance between the noninverting pin and the single ended driver) and your LVDS driver can safely get below 0.35V and above 1.45V without ringing at these levels. It does seem like using a device without the termination resistor would be easier (it makes Vref sit in a middle voltage -like 0.9V during both logic high and low states with more margin- without huge shifts unlike the termination variant). 

-Bobby