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DP83867E: about Fast Link Drop(FLD)

TOSHIKAZU HORI
Prodigy 170 points
Part Number: DP83867E

Thank you for your help.

Please tell me about the Fast Link Drop (FLD) function of DP83867E.
The datasheet states:

"The DP83867 includes advanced link-down functionality that supports a variety of real-time applications. The link-down mechanism is configurable and allows very fast reaction times for linking drops. Includes extended mode.
...
DP83867 supports an enhanced mode that shortens the window called fast link down mode. In this mode, the T1 window is significantly shortened to less than 10μs in most cases. ”

Near the end, there is an explanation that there is an enhanced mode called Fast Link Down Mode, which will be less than 10us in most cases.
Please tell me how to use this advanced mode.
We are wondering how we can use a high-speed link down mode of less than 10 us, and how we can also support high-speed detection of link loss in industrial Ethernet EtherCAT.

Thank you.

  • 0
    Prodigy 170 points

    Please let me add something.

    Fast Link Drop (FLG) can be set using the FLG_CFG register, but is it possible to associate the detection result with the output of one of the GPIOs of the DP83867?

    Thank you.

  • 0 in reply to TOSHIKAZU HORI
    TI__Mastermind 39895 points

    Hello,

    It appears you have found the FLD register for enabling. To enable a certain mechanism of FLD, please use [4:0]. If link were dropped due to one of these mechanisms, this can be checked via [12:8].

    I do not see any way to output FLD result to GPIOs. This will have to be polled via register.

    Sincerely,

    Gerome

  • 0 in reply to Gerome Cacho
    Prodigy 170 points

    Dear Gerome,

    Please let me check.

    1. Regarding the case of 100BASE-TX
    FLD_EN[14] in the FLD_CFG register seems to give permission settings for 1000BASE-T, but is it correct to assume that FLD also works for 100BASE-TX? Also, in the case of 100BASE-TX, what should FLD_EN[14] be?

    2.About FLD detection responsiveness
    So these detections are detected in less than 10us?

    3.About GPIO output
    This means that the FLD result cannot be output to GPIO and can only be read by polling the FLD_STS[12:8] register...
    Regarding the FLD detection results, is there any correlation with the various Link statuses of LED_GPIO and RGMII? I thought that if there was a correlation between the FLD detection results and that signal, it would be possible to make a decision based on that signal.What do you think?

    thank you.

    Best Regards,

  • 0 in reply to TOSHIKAZU HORI
    TI__Mastermind 39895 points

    Hello,

    Can you try enabling desired modes in [4:0]?

    There is no correlation of types of FLD mechanisms and RGMII. RGMII may change speeds upon any link drop, but that is independent of FLD mechanism.

    Sincerely,

    Gerome

  • +1 in reply to Gerome Cacho
    Prodigy 170 points

    Hello.

    I understand that there is no correlation between FLD and RGMII.
    Think about it from that premise.

    Thank you.