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DS90UB925Q-Q1: FPD Link Queries

Part Number: DS90UB925Q-Q1
Other Parts Discussed in Thread: ALP

Hi Glenn/Team,

Can you please look at this query from our customer and help with your comments? This is very strategic opportunity for India market

  1. In ALP application, While generating patterns – we need to configure the display timing parameter. In this same way, how can we configure the display timing parameters while generating custom display information(i.e Controller data display)? Shall we use Pattern generator register also for custom display information or any another way to do?

 

  1. As of my understand, If display need 33Mhz PCLK on Deserializer side, then serializer PCLK input also should be in 33MHz range. Is this correct? If any wrong in my understanding, kindly let us know formula for serializer PCLK input calculation based on Deserializer output.

  1. For serializer scripting program - kindly find the below display timing parameters (DE only mode). Kindly help with the script

PCLK – 27MHz

Total Horizontal width – 928

Total Vertical width – 525

Horizontal Active area – 800

Vertical Active area – 480

Horizontal sync width – 2

Vertical sync width – 2

Horizontal back porch – 22

Vertical back porch – 5

Horizontal front porch – 102

Vertical front porch – 30

HSYNC –OFF

VSYNC – OFF

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Hi Pratik,

Thank you for your question. On ALP, you can use the Video Control section on the Pattern Generator tab to set the display timings for custom resolutions. Also, which deserializer are you using for this?

And yes, this is correct. You need same PCLK from the serializer side.

Best regards,
Ikram