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TCAN4550-Q1: Configuring CAN controller through SPI

Part Number: TCAN4550-Q1
Other Parts Discussed in Thread: TCAN4550

I'm working on configuring the CAN bus on an Ambarella platform, specifically using a TCAN4550-Q1 CAN controller with SPI interface. And I'm encountering issues with bringing up the CAN interface (can0), and the system becomes unresponsive when attempting to do so.

I have checked the device tree configuration, verified hardware connections, and observed kernel logs indicating that the TCAN4x5x CAN controller is successfully initialized, but the CAN interface remains down.

This is the dmesg output 
[ 2.765559] tcan4x5x spi3.0: no clock found
[ 2.769764] tcan4x5x spi3.0: no CAN clock source defined
[ 2.780144] tcan4x5x spi3.0: setup mode 0, 8 bits/w, 10000000 Hz max --> 0
[ 2.809423] tcan4x5x spi3.0: m_can device registered (irq=46, version=32)
[ 2.816225] tcan4x5x spi3.0 can0: TCAN4X5X successfully initialized.

This is the device tree entry I'm using

spi3: spi@e0014000 {
cs-gpios = <&gpio 34 0>;
status = "okay";
tcan4x5x@0 {
compatible = "ti,tcan4x5x";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <10000000>;
interrupt-parent = <&gpio>;
interrupts = <&gpio 5 0>; 
bosch,mram-cfg = <0x0 0 0 16 0 0 1 1>;
reset-gpios = <&gpio 4 0 >;
status = "okay";

  • Hi Anand,

    Do you have the ability to directly read registers from the TCAN4550?  In some situations, the SPI driver is not correct and prevents register read/writes.  In particular, the SPI chip select may be transitioning high between data words in the middle of the transaction that can cause the TCAN4550 to abort or ignore the SPI transaction and set the SPI Error flag in the interrupt register. 

    Do you have the ability to monitor the SPI signals with a scope or logic analyzer so that we can verify they match the diagrams in the Programming Section (8.5) of the datasheet?