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TUSB1210: Impact of TUSB1210 pull down

Conor
Guru 12115 points
Part Number: TUSB1210

Hi,

According to 7.4.1 of the TUSB1210 datasheet, the internal PU/PD is enabled for the ULPI interface.

When connected to an FPGA, the FPGA is pulled up during configuration, and there is a possibility of a conflict between the FPGA pull up and ULPI pull down.

I would like to check the effect of pull down, so I would like to know the internal resistance value.

Thanks,

Conor

  • 0
    TI__Guru*** 145480 points

    Conor:

         the internal PU/PD is enabled for the ULPI interface. only during power on reset time, the PU or PD resistors are automatically replaced by driven ‘1’/’0’ levels respectively once internal IORST is released, So FPGA PU/PD will not affect ULPI during normal operation.

    Regards

    Brian