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PCA9306: What is the VIL/VIH and why the input of 1.8V is non-monotonic?

Part Number: PCA9306

Hi Team, 

There are still two questions that need to be consulted about PCA9306.
1- The PCA9306 datasheet seems to have no requirements for Vil/Vih of the input signal?
2- In addition, when we tested I2C 1V8<->3V3, we found that the I2C host (MARS) is connected to the 1V8 side. During the test, it was found that there was a groove on the edge of the 1V8 side when the signal fell. However, when the MARS GPIO is connected to the signal of the 74 series level shift chip, there is no backchannel phenomenon on the falling edge. What might be the reason for this?

Thanks. 

B.R.

Lucas

  • Hi Lucas,

    1- The PCA9306 datasheet seems to have no requirements for Vil/Vih of the input signal?

    The PCA9306 is a passive level shifting device. There are no VIL or VIH requirements, because the internal connection between side 1 and side 2 is a simple passFET. This device does not re-drive the I2C signal in any way. 

    2- In addition, when we tested I2C 1V8<->3V3, we found that the I2C host (MARS) is connected to the 1V8 side. During the test, it was found that there was a groove on the edge of the 1V8 side when the signal fell. However, when the MARS GPIO is connected to the signal of the 74 series level shift chip, there is no backchannel phenomenon on the falling edge. What might be the reason for this?

    Is there a datasheet to describe the characteristics of the 74-series level shifting chip? 

    This falling edge seems to be hanging due to the parasitic cap that can exist on both sides of the PCA9306. During a falling edge transition, the driver on side 1 pulling low has to drain charge off of parasitic bus cap on side 1. Once the voltage drops below the VTH of the internal passFET, side 2 is connected to side 1, and therefore has to drain the parasitic bus cap on side 2, therefore creating this hanging effect where there is a waiting transition on the falling edge. 

    Regards,

    Tyler