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Buffer Connectivity

Manikandan M M
Prodigy 170 points
Other Parts Discussed in Thread: SN74LVC07A, AM26LV31, TXU0104

Kindly find the attached diagram for buffer connectivity verification

1st Set:

FPGA driver: LVCMOS 1V8

SN74LVC07A: Open-drain Output

AM26LV31: RS422 O/P

2nd Set:

SN74LVC07A: Open-drain Output

CLVC16T245: Level Translator

FPGA : LVCMOS 1V8

Could you verify this one and tell me know is there any disadvantage of using open-collector output to RS422 input instead of Push-Pull buffer

  • 0
    Guru 317480 points

    Open-drain outputs indeed can be used for level shifting. (You have to ensure that the pull-up resistors are strong enough so that the rising edges are fast enough for your signal frequency. A level translator with push/pull outputs like the TXU0104 would avoid this possible problem.)