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TCAN1146-Q1: Watchdog failure output

Part Number: TCAN1146-Q1
Hi,
I'm using tcan1146 in a project with SDO/nINT de-multiplexing done using nCS switch.

I wanted to use nINT pin as a watchdog reset, but I can't get Watchdog failure output to work.

I use following configuration:
- nINT_SEL = 1 (Watchdog failure output)
- WD_CONFIG = Timeout
- WD_ERR_CNT_SET = 1 (5th error)
- WD_ACT = 1 (Sets WD interrupt only)
- WD_RST_PULSE left default
- SDO_CONFIG = 1 (SDO and nINT)
- INT_ENABLE_1 = 0x80 (WD), rest 0x0.

When watchdog fails, the pulse does not occur on the nINT pin.

When changing WD_ACT to 0 (Turns off INH for 300 ms and sets WD interrupt) i have power reset through INH on 5th error.
And when changing nINT_SEL to 0 (Global Interrupt) i have nINT pin being pulled down (without a pulse / nCS or register cleared) on 1st error (as DS specify).

So i assume the watchdog itself works, but the failure output doesn't. Is there any configuration setting composition needed? Any manual on how to setup this?
The documentation lacks information about application note of this output - like the usage is aimed as INH reset and global interrupt ones) and I'm only working based on assumptions here.

Best regards,
Mateusz

  • Mateusz,

    Thank you for your patience here, we'll look into this and have a response for you tomorrow by end of business.

    Regards,

    Eric Hackett 

  • Hi,
    Yes, I'm waiting patiently for the response. Any progress on that subject?

  • Mateusz,

    We are still looking into this, thank you for your patience again as our CAN experts are out of office until tomorrow. We will have a response for you then.

    Regards,

    Eric Hackett 

  • Hi Mateusz,

    Thanks for your patience on this topic. 

    Your configuration sequence looks correct here. The SDO/nINT pin should assert when a watchdog failure is triggered as long as the nCS pin remains high. Based on your testing with the WD_ACT set to pulse the INH signal, I assume your test is correctly triggering a watchdog failture that we should see reflected in the interrupt states. 

    Have you been able to read the interrupt states of the transceiver directly to confirm that WD flag is being set in the INT_1 Register? I would like to make sure your second test with the Global Interrupt results is not caused by another interrupt being set. Please also ensure that the WD_ENABLE bit is set in the INT_ENABLE_1 register to ensure that the watchdog interrupt is enabled. It may also be worth conducting this test with all other interrupts disabled in the INT_ENABLE_n registers to ensure that the behavior we're seeing in this case is due to the WD flag. 

    I will recreate these conditions on a unit that I have in the office to see if this may be a behavioral issue or if there is some configuration setting we may be missing. I'll get back to you with more information by the end of the week. Please keep me updated on your testing in the meantime. 

    Regards,
    Eric Schott