SN65DSI86EVM: Output Color Bar Pattern without DSI connection

Drew Westrick

Part Number: SN65DSI86EVM
Other Parts Discussed in Thread: SN65DSI86, TEST2

I'm trying to use the SN65DSI86EVM to do a color bar test on a BenQ GW2480 monitor connected to the development kit via a DisplayPort cable. I have tried to reference several posts here on E2E as well as use the SN65DSI86_PANEL_VIDEOREGISTER_CALC excel document with the EDID I collected from the display.

I'm using a Raspberry Pi 5 to send the I2C commands to the SN65DSI86 using the script below. I'm also attaching the EDID data I got using read-edid | parse-edid on a Linux machine connected to the GW2480.

# reset registers
i2cset -y 1 0x2d 0x09 0x01
sleep 1

# select clock
# 3-1: 100 - REFCLK at 27 Mhz
#i2cset -y 1 0x2D 0x0A 0x06
echo "Get 0x0A"
i2cget -y 1 0x2D 0x0A

# dsi
# 6-5: 01 - four DSI lanes (A)
# 4-3: 00 - 4 lanes
i2cset -y 1 0x2D 0x10 0x26
echo "Get 0x10"
i2cget -y 1 0x2D 0x10

# DSIA Clock
i2cset -y 1 0x2D 0x5C

# select datarate (we need 3.24 Gbps to do 1920*1080@60 over 2 lanes)
i2cset -y 1 0x2D 0x94 0x80

### enable pll
i2cset -y 1 0x2D 0x0D 0x01
sleep 1
echo "Get 0x0D"
i2cget -y 1 0x2D 0x0D
# check if pll is locked - MSB must be set.
echo "Get 0x0A"
i2cget -y 1 0x2D 0x0A
# this returns 0x86 -> pll = locked.

# enable assr on panel (native aux command)
i2cset -y 1 0x2D 0x64 0x01
sleep 1
i2cset -y 1 0x2D 0x74 0x00
sleep 1
i2cset -y 1 0x2D 0x75 0x01
sleep 1
i2cset -y 1 0x2D 0x76 0x0A
sleep 1
i2cset -y 1 0x2D 0x77 0x01
sleep 1
i2cset -y 1 0x2D 0x78 0x81

# enable enhanced framing & ASSR
i2cset -y 1 0x2D 0x5A 0x05

# 2 lanes - disable spread spectrum
i2cset -y 1 0x2D 0x93 0x20

### start semi auto link
i2cset -y 1 0x2D 0x96 0x0A
sleep 1
# i2cset -y 2 0x2D 0x96 0x09
echo "Get 0x96 and 0xF0"
i2cget -y 1 0x2D 0x96
i2cget -y 1 0x2D 0xF0
echo "Get 0xF1"
i2cget -y 1 0x2D 0xF1
echo "Get 0xF2"
i2cget -y 1 0x2D 0xF2
echo "Get 0xF3"
i2cget -y 1 0x2D 0xF3
echo "Get 0xF4"
i2cget -y 1 0x2D 0xF4
echo "Get 0xF5"
i2cget -y 1 0x2D 0xF5
echo "Get 0xF6"
i2cget -y 1 0x2D 0xF6
echo "Get 0xF7"
i2cget -y 1 0x2D 0xF7
echo "Get 0xF8"
i2cget -y 1 0x2D 0xF8
# this returns 0x01 -> link ok + switched to normal

### set resolution (calculated with excel sheet)
# active line length
i2cset -y 1 0x2D 0x20 0x08
i2cset -y 1 0x2D 0x21 0x70
# vertical active size
i2cset -y 1 0x2D 0x24 0x05
i2cset -y 1 0x2D 0x25 0xA0
# horizontal pulse width
i2cset -y 1 0x2D 0x2C 0x00
i2cset -y 1 0x2D 0x2D 0x20
# vertical pulse width
i2cset -y 1 0x2D 0x30 0x00
i2cset -y 1 0x2D 0x31 0x0A
# HBP
i2cset -y 1 0x2D 0x34 0x50
# VBP
i2cset -y 1 0x2D 0x36 0x1B
# HFP
i2cset -y 1 0x2D 0x38 0x30
# VFP
i2cset -y 1 0x2D 0x3A 0x03

# DP color format - 24bpp
i2cset -y 1 0x2D 0x5B 0x00

### colorbar
i2cset -y 1 0x2D 0x3C 0x12
echo "Get 0x3C"
i2cget -y 1 0x2D 0x3C
sleep 1
# Enable video stream - enable ASSR & enhanced framing
i2cset -y 1 0x2D 0x5A 0x0C
echo "Get 0x5A"
i2cget -y 1 0x2D 0x5A

Section "Monitor"
	Identifier "BenQ GW2480"
	ModelName "BenQ GW2480"
	VendorName "BNQ"
	# Monitor Manufactured week 33 of 2023
	# EDID version 1.4
	# Digital Display
	DisplaySize 530 300
	Gamma 2.20
	Option "DPMS" "true"
	Horizsync 30-83
	VertRefresh 50-76
	# Maximum pixel clock is 170MHz
	#Not giving standard mode: 1920x1080, 60Hz
	#Not giving standard mode: 1680x1050, 60Hz
	#Not giving standard mode: 1600x900, 60Hz
	#Not giving standard mode: 1280x1024, 60Hz
	#Not giving standard mode: 1280x800, 60Hz
	#Not giving standard mode: 1280x720, 60Hz

	#Extension block found. Parsing...
	Modeline 	"Mode 16" 148.50 1920 2008 2052 2200 1080 1084 1089 1125 +hsync +vsync 
	Modeline 	"Mode 0" 148.50 1920 2008 2052 2200 1080 1084 1089 1125 +hsync +vsync 
	Modeline 	"Mode 1" 148.500 1920 2008 2052 2200 1080 1084 1089 1125 +hsync +vsync
	Modeline 	"Mode 2" 148.500 1920 2448 2492 2640 1080 1084 1089 1125 +hsync +vsync
	Modeline 	"Mode 3" 74.250 1280 1390 1420 1650 720 725 730 750 +hsync +vsync
	Modeline 	"Mode 4" 74.250 1280 1720 1760 1980 720 725 730 750 +hsync +vsync
	Modeline 	"Mode 5" 27.027 720 736 798 858 480 489 495 525 -hsync -vsync
	Modeline 	"Mode 6" 27.000 720 732 796 864 576 581 586 625 -hsync -vsync
	Modeline 	"Mode 7" 27.027 720 736 798 858 480 489 495 525 -hsync -vsync
	Modeline 	"Mode 8" 27.000 720 732 796 864 576 581 586 625 -hsync -vsync
	Modeline 	"Mode 9" 25.200 640 656 752 800 480 490 492 525 -hsync -vsync
	Modeline 	"Mode 10" 74.250 1920 2448 2492 2640 1080 1082 1089 1125 +hsync +vsync interlace
	Modeline 	"Mode 11" 27.027 1440 1478 1602 1716 480 484 487 525 -hsync -vsync interlace
	Modeline 	"Mode 12" 27.027 1440 1478 1602 1716 480 484 487 525 -hsync -vsync interlace
	Modeline 	"Mode 13" 27.000 1440 1464 1590 1728 576 578 581 625 -hsync -vsync interlace
	Modeline 	"Mode 14" 27.000 1440 1464 1590 1728 576 578 581 625 -hsync -vsync interlace
	Modeline 	"Mode 15" 74.250 1920 2008 2052 2200 1080 1082 1087 1125 +hsync +vsync interlace
	Modeline 	"Mode 17" 74.25 1920 2008 2052 2200 540 542 547 562 +hsync +vsync interlace
	Modeline 	"Mode 18" 74.25 1280 1390 1430 1650 720 725 730 750 +hsync +vsync 
	Modeline 	"Mode 19" 27.00 720 736 798 858 480 489 495 525 -hsync -vsync 
	Option "PreferredMode" "Mode 16"
EndSection

00 ff ff ff ff ff ff 00 09 d1 e7 78 45 54 00 00
21 21 01 04 a5 35 1e 78 3a 05 65 a7 56 52 9c 27
0f 50 54 a5 6b 80 d1 c0 b3 00 a9 c0 81 80 81 00
81 c0 01 01 01 01 02 3a 80 18 71 38 2d 40 58 2c
45 00 0f 28 21 00 00 1e 00 00 00 ff 00 4b 38 50
30 31 36 31 35 30 31 51 0a 20 00 00 00 fd 00 32
4c 1e 53 11 01 0a 20 20 20 20 20 20 00 00 00 fc
00 42 65 6e 51 20 47 57 32 34 38 30 0a 20 01 5b
02 03 1c f1 4f 90 1f 04 13 03 12 02 11 01 14 06
07 15 16 05 23 09 07 07 83 01 00 00 02 3a 80 18
71 38 2d 40 58 2c 45 00 0f 28 21 00 00 1f 01 1d
80 18 71 1c 16 20 58 2c 25 00 0f 28 21 00 00 9f
01 1d 00 72 51 d0 1e 20 6e 28 55 00 0f 28 21 00
00 1e 8c 0a d0 8a 20 e0 2d 10 10 3e 96 00 0f 28
21 00 00 18 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 8d

over 2 years ago

0 Vishesh Pithadiya over 2 years ago

TI__Guru 57046 points

Hey Drew,

can you send me the statuses of registers 0xF0 - 0xF8?

Additionally try using this script to get the color bar to display.

Fullscreen 2620.1DP_4DSI_HBR_800x600_Color_Bar.xml Download

<aardvark>
    <configure i2c="1" spi="1" gpio="0" tpower="1" pullups="1"/>
    <i2c_bitrate khz="100"/>
    
  <i2c_write addr="0x2D" count="1" radix="16">5C 01</i2c_write> <sleep ms="10"/>

   <i2c_write addr="0x2D" count="1" radix="16">FF 07</i2c_write> <sleep ms="10"/>

======DUMP CFR======
   <i2c_write addr="0x2D" count="0" radix="16">16 </i2c_write> <sleep ms="10"/>

======Read======
    <i2c_read addr="0x2D" count="1" radix="16">00</i2c_read> <sleep ms="10"/>


   <i2c_write addr="0x2D" count="1" radix="16">16 01</i2c_write> <sleep ms="10"/>

   <i2c_write addr="0x2D" count="0" radix="16">16 </i2c_write> <sleep ms="10"/>

======Read======
    <i2c_read addr="0x2D" count="2" radix="16">00</i2c_read> <sleep ms="10"/>

  <i2c_write addr="0x2D" count="1" radix="16">FF 00</i2c_write> <sleep ms="10"/>


======Single 4 DSI lanes======

  <i2c_write addr="0x2D" count="1" radix="16">10 26 </i2c_write> <sleep ms="10"/>

======DSI CLK FREQ======

  <i2c_write addr="0x2D" count="0" radix="16">12 </i2c_write> <sleep ms="10"/>
   <i2c_read addr="0x2D" count="2" radix="16">00</i2c_read> <sleep ms="10"/>



======enhanced framing======

  <i2c_write addr="0x2D" count="1" radix="16">5A 04 </i2c_write> <sleep ms="10"/>


======ADDR 0x93 CFR======

   <i2c_write addr="0x2D" count="0" radix="16">93</i2c_write> <sleep ms="10"/>

======Read======
    <i2c_read addr="0x2D" count="6" radix="16">00</i2c_read> <sleep ms="10"/>

======Pre0dB 1 lanes no SSC======
   <i2c_write addr="0x2D" count="1" radix="16">93 10</i2c_write> <sleep ms="10"/>

======L0mV RBR======
   <i2c_write addr="0x2D" count="1" radix="16">94 80</i2c_write> <sleep ms="10"/>

======POST2 0dB ======
   <i2c_write addr="0x2D" count="1" radix="16">95 00</i2c_write> <sleep ms="10"/>

======PLL ENABLE======
   <i2c_write addr="0x2D" count="1" radix="16">0D 01</i2c_write> <sleep ms="10"/>
   <i2c_write addr="0x2D" count="0" radix="16">0A</i2c_write> <sleep ms="10"/>
   <i2c_read addr="0x2D" count="2" radix="16">00</i2c_read> <sleep ms="10"/>



======Semi-Auto TRAIN ======
   <i2c_write addr="0x2D" count="1" radix="16">96 0A</i2c_write> <sleep ms="20"/>


======ADDR 0x0A CFR======

   <i2c_write addr="0x2D" count="0" radix="16">96</i2c_write> <sleep ms="20"/>

======Read======
    <i2c_read addr="0x2D" count="1" radix="16">00</i2c_read> <sleep ms="10"/>

=====CHA_ACTIVE_LINE_LENGTH=======
    <i2c_write addr="0x2D" count="2" radix="16">20 00 04</i2c_write> <sleep ms="10"/>

=====CHA_VERTICAL_DISPLAY_SIZE=======
    <i2c_write addr="0x2D" count="2" radix="16">24 58 02</i2c_write> <sleep ms="10"/>

=====CHA_SYNC_DELAY=======
    <i2c_write addr="0x2D" count="2" radix="16">28 00 00</i2c_write> <sleep ms="10"/>

=====CHA_HSYNC_PULSE_WIDTH=======
    <i2c_write addr="0x2D" count="2" radix="16">2C 80 80</i2c_write> <sleep ms="10"/>

=====CHA_VSYNC_PULSE_WIDTH=======
    <i2c_write addr="0x2D" count="2" radix="16">30 04 80</i2c_write> <sleep ms="10"/>

=====CHA_HORIZONTAL_BACK_PORCH=======
    <i2c_write addr="0x2D" count="1" radix="16">34 28 </i2c_write> <sleep ms="10"/>

=====CHA_VERTICAL_BACK_PORCH=======
    <i2c_write addr="0x2D" count="1" radix="16">36 09</i2c_write> <sleep ms="10"/>

=====CHA_HORIZONTAL_FRONT_PORCH=======
    <i2c_write addr="0x2D" count="1" radix="16">38 28</i2c_write> <sleep ms="10"/>

=====CHA_VERTICAL_FRONT_PORCH=======
    <i2c_write addr="0x2D" count="1" radix="16">3A 01</i2c_write> <sleep ms="10"/>

=====DP_18BPP_EN =======
  <i2c_write addr="0x2D" count="1" radix="16">5B 01 </i2c_write> <sleep ms="100"/>

=====COLOR BAR =======
    <i2c_write addr="0x2D" count="1" radix="16">3C 10</i2c_write> <sleep ms="100"/>

======enhanced framing and Vstream enable======

  <i2c_write addr="0x2D" count="1" radix="16">5A 0C </i2c_write> <sleep ms="100"/>

======DUMP CFR======
    <i2c_write addr="0x2D" count="0" radix="16">20</i2c_write> <sleep ms="10"/>

======Read======
    <i2c_read addr="0x2D" count="32" radix="16">00</i2c_read> <sleep ms="10"/>



</aardvark>

We use an aardvark I2C controller, so the format will be different but you should be able to extract the register values from here.

0 Vishesh Pithadiya over 2 years ago in reply to Vishesh Pithadiya

TI__Guru 57046 points

0xF0 - 0xF8 are error registers and should help identify what the issue is.

0 Drew Westrick over 2 years ago in reply to Vishesh Pithadiya

Intellectual 890 points

Vishesh Pithadiya,

I was able to get the color bar working this morning. The script is attached below. It appears I can't use the ASSR setting and must use the Standard DP seed. Even if I try to enable it using the AUX I2C commands, I'm not able to get it working with ASSR. Do you know if certain displays / monitors lack ASSR support? Is there also a reason that TI locks the Standard DP seed behind the TEST2 pin / unlock sequence? My overall goal is to get this working with our selected LCD but figured I'd try with the development kit and known monitor first.

# reset registers
i2cset -y 1 0x2d 0x09 0x01
sleep 1

# select clock
# 3-1: 100 - REFCLK at 27 Mhz
i2cset -y 1 0x2D 0x0A 0x06
echo "Get 0x0A"
i2cget -y 1 0x2D 0x0A
# dsi
# 6-5: 01 - four DSI lanes (A)
# 4-3: 00 - 4 lanes
i2cset -y 1 0x2D 0x10 0x26
echo "Get 0x10"
i2cget -y 1 0x2D 0x10

# DSIA CLK FREQ 445Mhz
#i2cset -y 1 0x2D 0x12 0x59

# Enchanced Frame & ASSR
#i2cset -y 1 0x2D 0x5A 0x05

# 2DP lanes no SSC
i2cset -y 1 0x2D 0x93 0x20

# select datarate (we need 2.7 Gbps to do 1920*1080@60 over 2 lanes)
i2cset -y 1 0x2D 0x94 0x80

### enable pll
i2cset -y 1 0x2D 0x0D 0x01
sleep 1
echo "Get 0x0D"
i2cget -y 1 0x2D 0x0D
# check if pll is locked - MSB must be set.
echo "Get 0x0A"
i2cget -y 1 0x2D 0x0A
# this returns 0x86 -> pll = locked.

# POST-Cursor2 0DB
i2cset -y 1 0x2D 0x95 0x00

# enable assr on panel (native aux command)
i2cset -y 1 0x2D 0x64 0x01
i2cset -y 1 0x2D 0x74 0x00
i2cset -y 1 0x2D 0x75 0x01
i2cset -y 1 0x2D 0x76 0x0A
i2cset -y 1 0x2D 0x77 0x01
i2cset -y 1 0x2D 0x78 0x81
sleep 1

### start semi auto link
i2cset -y 1 0x2D 0x96 0x0A
sleep 1
echo "Get 0x96 and 0xF0"
i2cget -y 1 0x2D 0x96
i2cget -y 1 0x2D 0xF0
#echo "Get 0xF1"
#i2cget -y 1 0x2D 0xF1
#echo "Get 0xF2"
#i2cget -y 1 0x2D 0xF2
#echo "Get 0xF3"
#i2cget -y 1 0x2D 0xF3
#echo "Get 0xF4"
#i2cget -y 1 0x2D 0xF4
#echo "Get 0xF5"
#i2cget -y 1 0x2D 0xF5
#echo "Get 0xF6"
#i2cget -y 1 0x2D 0xF6
#echo "Get 0xF7"
#i2cget -y 1 0x2D 0xF7
#echo "Get 0xF8"
#i2cget -y 1 0x2D 0xF8
# this returns 0x01 -> link ok + switched to normal

### set resolution (calculated with excel sheet)
# active line length
i2cset -y 1 0x2D 0x20 0x80
i2cset -y 1 0x2D 0x21 0x07
# vertical active size
i2cset -y 1 0x2D 0x24 0x38
i2cset -y 1 0x2D 0x25 0x04
# horizontal pulse width
i2cset -y 1 0x2D 0x2C 0x2C
i2cset -y 1 0x2D 0x2D 0x00
# vertical pulse width
i2cset -y 1 0x2D 0x30 0x05
i2cset -y 1 0x2D 0x31 0x00
# HBP
i2cset -y 1 0x2D 0x34 0x94
# VBP
i2cset -y 1 0x2D 0x36 0x24
# HFP
i2cset -y 1 0x2D 0x38 0x58
# VFP
i2cset -y 1 0x2D 0x3A 0x04

# DP color format - 24bpp
i2cset -y 1 0x2D 0x5B 0x00

### colorbar
i2cset -y 1 0x2D 0x3C 0x10
echo "Get 0x3C"
i2cget -y 1 0x2D 0x3C
sleep 1

i2cset -y 1 0x2D 0xFF 0x07
i2cset -y 1 0x2D 0x16 0x01
echo "Get 0x16"
i2cget -y 1 0x2D 0x16
i2cset -y 1 0x2D 0xFF 0x00

# Enable video stream - disable ASSR
i2cset -y 1 0x2D 0x5A 0x0C
echo "Get 0x5A"
i2cget -y 1 0x2D 0x5A

0 Drew Westrick over 2 years ago

Intellectual 890 points

Vishesh Pithadiya,

Using the script below I also now have the color bar running on my display. This display does support ASSR, but you have to enable it using the AUX commands. I really wish there was a better way to tell which displays / monitors do and don't support this feature. I've posted the code below in case others find is useful.

# select clock REFCLK at 27 Mhz
i2cset -y 2 0x2D 0x0A 0x06
echo "Get 0x0A"
i2cget -y 2 0x2D 0x0A

# DSI - 4 lanes
i2cset -y 2 0x2D 0x10 0x26
echo "Get 0x10"
i2cget -y 2 0x2D 0x10

# DSIA CLK FREQ 445Mhz
i2cset -y 2 0x2D 0x12 0x59

# Enchanced Frame & ASSR
i2cset -y 2 0x2D 0x5A 0x05

# 2DP lanes no SSC
i2cset -y 2 0x2D 0x93 0x20

# select datarate (we need 2.7 Gbps to do 1920*1080@60 over 2 lanes)
i2cset -y 2 0x2D 0x94 0x80

### enable pll
i2cset -y 2 0x2D 0x0D 0x01
sleep 0.1
echo "Get 0x0D"
i2cget -y 2 0x2D 0x0D
# check if pll is locked - MSB must be set.
echo "Get 0x0A"
i2cget -y 2 0x2D 0x0A
# this returns 0x86 -> pll = locked.

# POST-Cursor2 0DB
i2cset -y 2 0x2D 0x95 0x01

# enable assr on panel (native aux command)
i2cset -y 2 0x2D 0x64 0x01
i2cset -y 2 0x2D 0x74 0x00
i2cset -y 2 0x2D 0x75 0x01
i2cset -y 2 0x2D 0x76 0x0A
i2cset -y 2 0x2D 0x77 0x01
i2cset -y 2 0x2D 0x78 0x81

### start semi auto link
i2cset -y 2 0x2D 0x96 0x0A
sleep 0.1
echo "Get 0x96"
i2cget -y 2 0x2D 0x96
echo "Get 0xF0"
i2cget -y 2 0x2D 0xF0
echo "Get 0xF1"
i2cget -y 2 0x2D 0xF1
echo "Get 0xF2"
i2cget -y 2 0x2D 0xF2
echo "Get 0xF3"
i2cget -y 2 0x2D 0xF3
echo "Get 0xF4"
i2cget -y 2 0x2D 0xF4
echo "Get 0xF5"
i2cget -y 2 0x2D 0xF5
echo "Get 0xF6"
i2cget -y 2 0x2D 0xF6
echo "Get 0xF7"
i2cget -y 2 0x2D 0xF7
echo "Get 0xF8"
i2cget -y 2 0x2D 0xF8

### set resolution (calculated with excel sheet)
# active line length
i2cset -y 2 0x2D 0x20 0x80
i2cset -y 2 0x2D 0x21 0x07
# vertical active size
i2cset -y 2 0x2D 0x24 0x38
i2cset -y 2 0x2D 0x25 0x04
# horizontal pulse width
i2cset -y 2 0x2D 0x2C 0x2C
i2cset -y 2 0x2D 0x2D 0x00
# vertical pulse width
i2cset -y 2 0x2D 0x30 0x05
i2cset -y 2 0x2D 0x31 0x00
# HBP
i2cset -y 2 0x2D 0x34 0x94
# VBP
i2cset -y 2 0x2D 0x36 0x24
# HFP
i2cset -y 2 0x2D 0x38 0x58
# VFP
i2cset -y 2 0x2D 0x3A 0x04

# DP color format - 24bpp
i2cset -y 2 0x2D 0x5B 0x00

### colorbar
i2cset -y 2 0x2D 0x3C 0x10
echo "Get 0x3C"
i2cget -y 2 0x2D 0x3C

# Enable video stream - enable ASSR & enhanced framing
i2cset -y 2 0x2D 0x5A 0x0D
echo "Get 0x5A"
i2cget -y 2 0x2D 0x5A

0 Vishesh Pithadiya over 2 years ago in reply to Drew Westrick

TI__Guru 57046 points

Hey Drew,

Glad to hear you got it working!

Yeah unfortunately there isn't an easy way to identify which monitors and panels support ASSR. Let me know if you have any more questions during your LCD panel implementation.

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SN65DSI86EVM: Output Color Bar Pattern without DSI connection