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TCAN4550-Q1: Question about Tx/Rx buffer and fifo

Part Number: TCAN4550-Q1

Hi expert,

I have following question:

1)What is the difference between Rx fifo and Rx buffer? Is it possible to select modes by register configuration?

2)Can the two Tx buffer modes, Tx fifo and Tx queue, be distinguished by register configuration?

3)Compared with the header of Tx FIFO/Buffer Element, Tx Event FIFO has more Tx Timestamp and Event Type information. In what scenarios does the Transmission in spite of possibility type in Event Type appear?

Thanks!

  • Hi Jass,

    Generally I would refer you to read the following two documents that contain detailed information and the answers to your questions.

    TCAN45xx Software User's Guide (Link).

    Bosch M_CAN User's Manual (Link).

    1)What is the difference between Rx fifo and Rx buffer? Is it possible to select modes by register configuration?

    RX Buffer and FIFO elements both store the same RX Message information.  The only difference is how the device stores the messages and reports to the MCU which element contains the new message.  The RX FIFOs store messages in consecutive memory elements starting with index 0.  There is a Get and Put Index associated with the FIFO that should be read by the MCU so that it can read and acknowledge or clear the oldest message and FIFO element so that the RX messages are read in the order they were received.

    Message ID filters can be used to direct messages to specific dedicated RX Buffer elements based on that element's index.  There is a New Data register that simply indicated with dedicated RX Buffer elements contain new messages and the MCU can read and clear them in any order.

    Both dedicated RX Buffers and RX FIFOs can be enabled and configured through the register configuration.  There are no restrictions or requirements to use any specific type or number of RX elements in your application.

    2)Can the two Tx buffer modes, Tx fifo and Tx queue, be distinguished by register configuration?

    Yes, this is configured with the registers.  You can have dedicated TX Buffers only, a TX FIFO or a TX Queue only, or a mixture of both a TX Buffer and either a TX FIFO or TX Queue.  However, you can't have both a TX FIFO and TX Queue at the same time because they conflict in the way they transmit the messages.  A TX FIFO will transmit the messages in the order they are placed in the FIFO.  A TX Queue will transmit the messages based on the highest priority message ID according to CAN Arbitration rules where the lowest message ID will have the highest priority.

    3)Compared with the header of Tx FIFO/Buffer Element, Tx Event FIFO has more Tx Timestamp and Event Type information. In what scenarios does the Transmission in spite of possibility type in Event Type appear?

    The TX Event FIFO is optional and simply logs information about the transmission of TX messages in either the TX FIFO or TX Buffer if the MCU or application needs to track and monitor the transmission of the messages.  The device will transmit message with or without the TX Event FIFO enabled.

    Regards,

    Jonathan