SN65HVD3082E: How long should we wait to transfer data after enable chip

Powering up is the same as coming out of shutdown, so look at t_PZH(SHDN)/t_PZL(SHDN).

Hi Dillen,

This information is found in the switching characteristics tables in the datasheets

Driver:

So the max enable time - from shutdown (a low to high transition on DE while /RE is held to VCC) and normal (a low to high transition on DE while /RE is held to GND) has the same max consideration - which is 7000ns (7us). That means the device could take up to 7000ns to enable - the test condition is shown below:

One important factor to consider here is that we only have this spec tested with a 50pF capacitor so additional capacitance could increase the enable time by increasing the rise/fall time on the communication node - but generally speaking if you design for 7us you really shouldn't have issues unless your communication node is very capacitive. 

This only applies to the driver side of the device the receiver information is shown below:

You can see that there are enable specs for shutdown (where DE = 0V when /RE makes the VCC to 0V transition) and normal (where DE = Logic High when /RE makes the VCC to 0V transition).

However they are very different. In active mode the receiver will enable within 50ns - whereas in shutdown it is 3500ns max. 

With all of that being said however - one of the most common implementations is to use 1 control signal on both DE and /RE (so essentially shorting these pins together). In that case as long as the transition time on the control line is fast  enough the enable times when the device isn't in shutdown will be more relevant.

So ultimately there is some variability in how long you must wait depending on the system setup and what part of the device you are enabling  - but the basic guidelines are shown above and discussed in datasheet. 

Please let me know if you have any additional questions and I will see what I can do!

Best,

Parker Dodson