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TCAN1044A-Q1: error frame detect at heavy load communication

Chuqiang Wen
Expert 5865 points
Part Number: TCAN1044A-Q1

Hi Expert, 

Customer report an issue for TCAN1044A-Q1 that it will detect the error frame at heavy load(>90%) communication. The test procedure as below. 

Repeat the IG ON/OFF test(turn on/off CAN communication), the error frame was observed. You can find the waveform as below. Customer tried the same test method at TCAN1043A, but not observe the error frame. 

I am not familiar with this test and please help provide some suggestions to debug. If anything not clear, feel free to ask. 

Error frame waveform(CH4 green one is standby pin, CH1 yellow one is CANL-CANH): use differential probe, so 0 stands for recessive, 1 stands for dominant state. 

Zoom in: we can see the error frame detected in red box, 12 bit dominant state. 

Thanks!

Ethan Wen

  • 0
    TI__Guru 74292 points

    Ethan,

    Thanks for bringing this to E2E. Heavy bus loading can cause communication errors in systems with higher data rates, large physical bus topologies, etc. because of timing issues or distorted CAN bus waveforms causing a mismatch between TXD and RXD. Is it possible to share more details about the communication bus (how many nodes, how long it is), data rate being used (it looks like 500kbps based on the single bit width of 2us), and capturing TXD and RXD on top of the waveforms already captured? Also, what kind of error is the controller reporting when this occurs? And does this issue ever occur when STB is low?

    Regards,

    Eric Hackett 

  • 0 in reply to Eric Hackett
    TI__Expert 5865 points

    Hi Eric, 

    Thanks for your support. 

    Eric Hackett said:
    Is it possible to share more details about the communication bus (how many nodes, how long it is),

    Two nodes, DUT and test PC, the distance is about 1m. 

    Eric Hackett said:
    data rate being used (it looks like 500kbps based on the single bit width of 2us),

    CAN FD, the data rate in the arbitration segment and ACK segment is 500kbps, and the data segment rate is 2Mbps.

    Eric Hackett said:
    Also, what kind of error is the controller reporting when this occurs?

    Bit check error

    Eric Hackett said:
    And does this issue ever occur when STB is low?

    Customer observed this issue when STB is low. But error frames are only detected near the time when STB changes from high to low. 

    Regards,

    Ethan Wen

  • 0 in reply to Chuqiang Wen
    TI__Guru 74292 points

    Ethan,

    Okay, it's interesting that it occurs before the transition though, so it doesn't seem to be the result of the mode transition directly. Can RXD and TXD waveforms be shared as well?

    Regards,

    Eric Hackett 

  • 0 in reply to Eric Hackett
    Prodigy 30 points

    Hi, Eric

            I'm TI's customer。

           First, I'm sorry, there were some mistakes in the reply I provide to Ethan before。①kind of error of the test PC node's controller reporting is stuff error.  ②error frames only occur after STB is low(The previous waveform pointed at the wrong test point, so the previous  waveform  provided was incorrect). Please refer to the following correct waveform.

    RXD and TXD and CANH-CANL and STB waveforms as follows:

     

     

    CH1: CANL-CANH

    CH2:TXD

    CH3:STB

    CH4:RXD

     

  • 0 in reply to yuxin hu
    TI__Guru 74292 points

    Yuxin,

    It's interesting that the bus is going into a dominant prior to TXD going low, is TXD being probed at the transceiver? Let me digest this information a bit more and get back to you before end of business 1/11 with a response.

    Regards,

    Eric Hackett 

  • 0 in reply to Eric Hackett
    Prodigy 30 points

    is TXD being probed at the transceiver?

    --Yes,tested point at T567.

  • 0 in reply to yuxin hu
    TI__Guru 74292 points

    Yuxin,

    Then I'm confused what's driving the CAN bus dominant, is the PC detecting an error and then driving the active error frame? That doesn't make sense either since it claims a receive error in the log.

    Regards,

    Eric Hackett

  • 0 in reply to Eric Hackett
    Prodigy 30 points

    I think that MCU detecting an error and then driving the acitve error frame. The reason is MCU pull low TXD before CAN bus change to dominance.

    Bus I don't know why MCU detecting an error have a high probability after STB change to LOW .

  • 0 in reply to yuxin hu
    TI__Guru 74292 points

    Yuxin,

    Thanks for this information, we'll have a response for you tomorrow by end of business.

    Regards,

    Eric Hackett 

  • 0 in reply to Eric Hackett
    TI__Expert 5865 points

    Hi Eric, 

    Any observation on this case? 

    Thanks!

    Ethan Wen