Thank you for your help.
Refers to the DP83867E datasheet (Rev.D).
Looking at the explanation of the "8.6.1 Basic Mode Control Register (BMCR)" register, when "Bit 14: LOOPBACK" is set to "1: Enable", a route is created for the MAC transmit data to the receive data path and a loopback test is performed. It is said that it can be done.
However, there are some caveats:
"The loopback function enables MAC transmit data to be routed to the MAC receive data path.
Setting this bit may cause the descrambler to lose synchronization and produce a 500-μs dead time before any valid data will appear at the MII receive outputs."
It seems that the following four routes can be selected for the loopback route, but do the above notes require the same precautions no matter which route is selected?
(1) MII Loopback
(2) PCS Loopback
(3) Digital Loopback
(4) Analog Loopback
Wouldn't it be possible to loop back normal data to the MAC on the receive data path within 10us after setting "Enable"?
For example, if you choose routes (1), (2), and (3), I would like to know more about responsiveness, such as being able to return valid data within 10 us.
Thank you.
