DS90UB954-Q1: if PDB pin reset the serializer can be impacted by any configurations

Weicheng Li

Part Number: DS90UB954-Q1

Hi TI expert

Assuming that pull down PDB pin to reach the system level safe state once required, would you please help to clarify if any wrong configuration can affect that? if yes, can you please point out which configuration?

Thank you!

Weicheng Li

over 1 year ago

0 Zoe Bison over 1 year ago

TI__Mastermind 23835 points

Hi Weicheng,

Let me confirm with the team internally on this question. I will plan to update this in ~1-2 days.

Best,

Zoe

0 Zoe Bison over 1 year ago

TI__Mastermind 23835 points

Hi Weicheng,

The PDB pin operation can be impacted by the rise and fall time specifications. The PDB timing specification for the UB954 can be found here:

Would you be able to elaborate on your question if this is not the information you are looking for?

Best,

Zoe

0 Weicheng Li over 1 year ago in reply to Zoe Bison

Intellectual 375 points

Hi Zoe

Thanks! Rise and fall time I can understand, we have to confirm if we intend to use PDB to reach system level safe state, if there is any dependency on configuration, in other words, is there any configuration needs to be monitored to ensure PDB work properly.

Thanks!

0 Zoe Bison over 1 year ago in reply to Weicheng Li

TI__Mastermind 23835 points

Hi Weicheng,

I appreciate the clarification on the question. Improper PDB operation can be reflected by the following: Lock and Pass signals low, unable to communicate via I2C, and device startup issue.

Startup can be confirmed following PDB assertion for example by reading the IDX and MODE straps.

Best,

Zoe

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DS90UB954-Q1: if PDB pin reset the serializer can be impacted by any configurations