DS90CF386: Can I get the 13.5MHz frequency at output side of this part.

Sanjay Gadkari

Part Number: DS90CF386

Hi Team,

I am using DS90CF386MTD receiver in my designing in which input is coming from CPU and the output is going to FPGA for the resolution 768 x 576 with 50Hz frequency. my requirement is the output clock RxCLKOUT shoud be 13.5 MHz.

Can I get the same frequency at output side of this part. if yes then then what frequency I should apply at the input side for the same resolution.

also elaborate the function of PLL in receiver only.

I have gone through many designs' application, but I did not get any answer on this.

so please guide us for the same , waiting for your reply.

Regards,

Sanjay

over 1 year ago

0 Nikolas Antonucci over 1 year ago

TI__Mastermind 21175 points

Hi Sanjay,

Sanjay Gadkari said:
Can I get the same frequency at output side of this part. if yes then then what frequency I should apply at the input side for the same resolution.

Please allow me one business day to look into this further.

Sanjay Gadkari said:
also elaborate the function of PLL in receiver only.

Please see Section 7.3.2 - Phased Lock Loop (PLL) of the DS90CF3x6 datasheet for more information

Best,

Nikolas

0 Nikolas Antonucci over 1 year ago in reply to Nikolas Antonucci

TI__Mastermind 21175 points

Hi Sanjay,

I do not believe that RxCLKOUT is programmable on this device. What you input at RxCLKIN should be what you see at RxCLKOUT.

Best,

Nikolas

0 Sanjay Gadkari over 1 year ago in reply to Nikolas Antonucci

Prodigy 170 points

Thank you so much for answer and SORRY for the delay.

0 Nikolas Antonucci over 1 year ago in reply to Sanjay Gadkari

TI__Mastermind 21175 points

Hello,

No worries, happy to help. Since there seems to be no further questions, I am going to mark this thread as closed now. Please open a new E2E if you have any other questions.

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DS90CF386: Can I get the 13.5MHz frequency at output side of this part.