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THVD2450: THVD2450 and TXB0108

Stephen Hudson
Prodigy 10 points
Part Number: THVD2450
Other Parts Discussed in Thread: TXB0108, ,

I am working on a bidirectional bus design and planning to use the THVD2450. Is it possible to connect the D and R lines together? My plan is to connect these together and connect them to the TXB0108 to translate to 2.5V FPGA I/O lines. Thank you.

  • 0
    TI__Guru 52192 points

    Hi Stephen,

    Thanks for reaching out.

    So the answer is yes, but there is a bit of nuance to how to do this. Essentially you don't want R and D shorted together if both the driver and receiver are enabled (DE = High, /RE = Low)  because then you will create a feed-back loop when a logic high signal is applied to the D - pin. (D pin input high will translate to "A" pin going high and "B" pin going low - the receiver will then read "A" as high and "B" as low as a logic high input and output high on "R" which will then be fed back into "D". So communication would be not be great. This problem can be remedied by also tying /RE and DE together - which will then act as a singular direction control pin - where "high" enables driver and "low" enables receiver, but I am not sure if you can make this configuration work in your system as it seems you may be limited number of signals you can support.

    Another concern is that we don't have a specified "max" rating on "R" pin - while it can handle up to VCC during operation we don't guarantee rating when VCC is = 0V - so if VCC = 0V no signal should be applied at the combined D, R pin to mitigate risk. 

    With that being said - if the only reason you are using the TXB0108 is for bi-directional level translation - I'd honestly advise you look at the THVD2450V as it allows for split supply operation - meaning that all the logic pins can be supplied by a source from 1.65V to 5.5V - so the logic signals can be powered and device can be controlled from a 2.5V controller/FPGA no problem. There is a bus side supply which will still require a 3V to 5.5V source as that is required to meet RS-485 specifications, but essentially the "V" version of the THVD2450 device adds a integrated level translator + optional slew rate limiting (which can just be ignored if you need the full 50Mbps - but if you only need up to 20Mbps then this device can slow down the slew rate). Essentially you may be able to simplify the system design to a 1 chip solution using the THVD2450V instead; however, the THVD2450 + TXB0108 should also be okay because the THVD2450 "R" pin can source/sink +/-2mA without  issue (we recommend up to +/-8mA  - so 2mA is fine) if you prefer this solution. 

    Please let me know if you have any other questions and I will see what I can do!

    Best,

    Parker Dodson

  • 0
    Prodigy 10 points

    Hi Parker,

    Thanks for the discussion and suggestion.

    I neglected to mention that DE and RE would be tied together and the FPGA would control direction of signal. The FPGA I/O is bidirectional, so the plan was to tie the R and D pins together in connecting to the I/O.

    I appreciate the suggestion of the THVD2450V. I used the TXB0108 in a design several years ago and was just lifting some elements of that design to incorporate in this one. Use of the THVD2450V will simplify the current design. Thank you.

    Regards,

    Steve