SN65DSI84: Display shifting

zhou liang

Part Number: SN65DSI84

Hi team

We use imx8mp platform to develop our product, and use SN65DSI84 to convert the MIPI signals to LVDS signals, we have encountered a display shifting issue during testing our board, the screen resolution is 1920x1080, it sometimes has a large offset in the x direction.

In this test, we use the weston to show a background on the screen, no other display related app involved in this test.

The origin image is as follows:

It is worth noting that the screen does not shift every time when I boot the system. The probability of the screen shifting is about 1/15. The offset of the image on the screen in the x direction is the same every time.

The register are dumped as follows:

root@:/var/lib/systemd/coredump# i2cdump -f -y 13 0x2c
No size specified (using byte-data access)
0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef
00: 35 38 49 53 44 20 20 20 01 00 85 28 00 01 00 00 58ISD ?.?(.?..
10: 26 00 55 00 00 00 00 00 0c 05 03 00 00 00 00 00 &.U.....???.....
20: 80 07 00 00 38 04 00 00 21 00 00 00 0f 00 00 00 ??..8?..!...?...
30: 0a 00 00 00 2d 00 0a 00 2d 00 0a 00 00 00 00 00 ?...-.?.-.?.....
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
f0: 00 00 00 00 40 00 00 80 00 00 00 00 00 00 00 00 ....@..?........

When the screen is normal, the registers are as follows:

No size specified (using byte-data access)
0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef
00: 35 38 49 53 44 20 20 20 01 00 85 28 00 01 00 00 58ISD ?.?(.?..
10: 26 00 55 00 00 00 00 00 0c 05 03 00 00 00 00 00 &.U.....???.....
20: 80 07 00 00 38 04 00 00 21 00 00 00 0f 00 00 00 ??..8?..!...?...
30: 0a 00 00 00 2d 00 0a 00 2d 00 0a 00 00 00 00 00 ?...-.?.-.?.....
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
f0: 00 00 00 00 40 00 00 80 00 00 00 00 00 00 00 00 ....@..?........

Can you help me find out what's wrong with the configuration of SN65DSI84?

Snow

Best regards

over 1 year ago

0 Vishesh Pithadiya over 1 year ago

TI__Mastermind 45081 points

Hey Liang,

This is most likely due to a hsync and vsync timing issue, but there is also a possibility of a jittery clock.

The best way to test if the issue is coming from the inputs to the device or the clock itself is to use the internal color bar pattern. It seems you are using the DSI clock as the LVDS clock source, so you will need to leave this connection intact, but the device will generate its own stream eliminating the input data as a source of error. If the display still is offset sometimes when using the color bar, the device is not configured correctly. If no offset is observed using the color bar, please confirm the signal integrity of the DSI inputs.

To enable the color bar pattern you will need to set the values of all registers seen in table 7-9 in the datasheet.

0 zhou liang over 1 year ago in reply to Vishesh Pithadiya

Prodigy 90 points

Hi Vishesh ,

Thank you for your help. I did the color bar pattern test when the background has shifting. After I am re-config the registers of the SN65DSI84 , the screen displays as follows:

From the image, it seems doesn't have x offset, does this mean the configuration of SN65DSI84 is correct, but the DSI input has some problems?

Thank you!

Zhou Liang

Best Regards

0 Vishesh Pithadiya over 1 year ago in reply to zhou liang

TI__Mastermind 45081 points

I agree, the offset seems to be stemming from the input signal/ improper matching with the DSI84 registers. We have determined that the issue is not with the device itself, but its handling of the input signals. I recommend verifying your DSI inputs and DSI register settings using the DSI tuner tool, and using a protocol analyzer to confirm the DSI inputs.

Additionally, it seems there is discoloring on the central red bar, is this a shadow?

0 zhou liang over 1 year ago in reply to Vishesh Pithadiya

Prodigy 90 points

Hi Vishesh ,

The red bar in the middle has two parts:
1. red
2. dark red

This is cause by some incorrect register value, I correct some of the registers, then test it again, the red bar looks correct.

Zhou Liang

Best Regards

0 Vishesh Pithadiya over 1 year ago in reply to zhou liang

TI__Mastermind 45081 points

Ok perfect,

Now the next steps would be to verify that the input signal are within MIPI spec, and double checking the register settings in the DSI84 using the DSI tuner tool.