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DP83869HM: Synchronous Ethernet in 1000BASE-X mode

Steven Hansen
Intellectual 666 points
Part Number: DP83869HM

We are considering DP83869HM for a RGMII-to-1000BASE-X (fiber) application where synchronous Ethernet is required. How should we set IO_MUX_CFG (register 0x170) CLK_O_SEL to generate the receive clock on the CLK_OUT pin?

In other words, what is the difference between CLK_O_SEL = 0x0 (Channel A receive clock), 0x1 (Channel B receive clock), 0x2 (Channel C receive clock), or 0x3 (Channel D receive clock) when operating in 1000BASE-X mode?

  • +1
    TI__Mastermind 24988 points

    Hi Steven,

    This mux selection synchronizes the clock to the selected channel.

    For 1000BASE-X, selecting any of the transmit/receive channels being used is sufficient to have a synchronous clock between devices.

    This FAQ has more details for configuring this.

    Thank you,

    Evan