TUSB8041: TUSB8041IRGCR eye pattern fail

GARETH OU

Guru 11355 points

Part Number: TUSB8041

Customer is verifying USB2.0 Eye Pattern test Fail Is there anything that can be adjusted in this part?

The schematic is provided as attachment, the Fail port is located in USB3 (circuit diagram)

over 1 year ago

0 Brian Zhou over 1 year ago

TI__Guru*** 144195 points

Hi Gareth:

Customer can lower USB_R1 value to increase USB2 eye height. It failed on upstream port or downstream port?

how long is the trace length for that port?

Regards

Brian

0 GARETH OU over 1 year ago in reply to Brian Zhou

Guru 11355 points

Hi Brian

The customer is upstream port fail

Is there a range as to how small USB_R1 can be adjusted?

Trace length is as follows..

0 Brian Zhou over 1 year ago in reply to GARETH OU

TI__Guru*** 144195 points

Hi Gareth:

Customer can try 9k for R1. What is trace length for DP_UP and DM_UP?

Regards

Brian

0 Brian Zhou over 1 year ago in reply to Brian Zhou

TI__Guru*** 144195 points

Hi Gareth:

any update for this issue?

Regards

Brian

0 GARETH OU over 1 year ago in reply to Brian Zhou

Guru 11355 points

Hi Brian

Thank you for your information. We will lower the USB_R1 resistance for verification. If there are any questions, we will contact you again.

It failed on upstream port right. Currently, there is no problem with the SoC native port verification eye pattern.

There should be no problem with the SoC to HUB section. The following is the SoC to HUB trace length table.

What is trace length for DP_UP and DM_UP?

0 Brian Zhou over 1 year ago in reply to GARETH OU

TI__Guru*** 144195 points

Hi Gareth:

Normally if DP/DM trace length is over 4ch, USB2 HS eye diagram may not pass.

Is hub upstream port connected to SOC with trace only or with cable? I just wonder why need to test hub upstream port HS eye diagram if it is not connected to USB connector.

Regards

Brian

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TUSB8041: TUSB8041IRGCR eye pattern fail