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DP83869HM: 100M media converter SOP and SON signal and register reading

Part Number: DP83869HM


Hi,

For 100M media converter what is the register reading for successful Ping test.

and how the SOP & SON signal will be observed in scope.

In our customized board we are not using the controller to capture the ping . 
its pure Analog circuit. but Rj45 directly connected to DP chip from PC and we are trying to observe the SOP & SON signal through scope.

as of now its just 010101 signal before ping and after ping.

what is the time interval the DP chip will capture the ping. is there any thing related time interval between the multiple pings.

 what is the correct register reading to capture the 100M media converter for successful ping test.

where the signal is lost in DP chip not able to identify.

please suggest on the above query. 

  • Hello,

    Ping operation is actual controlled and monitored at the MAC. The PHY, for all intents and purposes, does not care about the data being passed through and will convert from MDI to MII and vise versa. SGMII is LVDS, so it would fit the 1010 pattern you are describing as this is a differential 2 level signal. To check ping, you need to use the MAC's capabilities to see whether or not packets are being received. So long as the PHY has MDI link (Reg 0x1[2]) and SGMII link (Reg 0x37[0]), it is doing its part for the ping operation.

    Sincerely,

    Gerome

  • Hi , 
    Thank you for the response

    How the MAC capability will be verified.
    How I can confirm that PHY chip is successfully capturing the ping.
    Let for 100M media converter in my case DP chip SOP /SON during Ping test not changing the signal pattern
    I need to understand the During Ping what will be the output
    can share the SOP / SON signal output waveform and suggest on the Register reading for verifying the signal transfer successful.

    Regards,

  • Hello,

    You will need to contact the MAC vendor for this. It will not be advantageous to understand the SOP/SON waveform output as this is encoded in LVDS and Ethernet packet structure. Instead, so long as the MDI and SGMII links are up, we can say that PHY is doing its part in the communication. The rest will need to be checked with the MAC vendor.

    Sincerely,

    Gerome