This are the below log which we are getting on drm and we don't see any signals on MIPI_DSI1_CLK_N , MIPI_DSI1_CLK_P and in data lines
[ 6.642665] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 6.666201] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 6.851009] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 6.956144] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
[ 7.719265] imx-drm display-subsystem: bound imx-lcdifv3-crtc.0 (ops lcdifv3_crtc_ops)
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
#if 0
sn65_bridge: sn65dsi86@2c {
#address-cells = <1>;
#size-cells = <0>;
compatible = "ti,sn65dsi86";
reg = <0x2c>;
ti,dsi-lanes = <4>;
max,dsi-channel = <1>;
ti,dp-lanes = <2>;
status = "okay";
pinctrl-0 = <&pinctrl_mipi_dsi_en>;
enable-gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>;
interrupts-extended = <&gpio5 12 IRQ_TYPE_EDGE_FALLING>;
/*vccio-supply = <&ldo6_reg>; //1.8V
vcca-supply = <&buck1_reg>; //1.2V
vpll-supply = <&ldo6_reg>; //1.8V
vcc-supply = <&buck1_reg>; //1.2V*/
clock-names = "refclk";
clocks = <&sn65dsi86_refclk>;
no-hpd;
sn65dsi86,addresses = <0x0A 0x10 0x12 0x13
0x94 0x0D 0x64 0x74
0x75 0x76 0x77 0x78
0x5A 0x93 0x96 0x20
0x21 0x22 0x23 0x24
0x25 0x2C 0x2D 0x30
0x31 0x34 0x36 0x3A
0x5B 0x3C 0x5A>;
sn65dsi86,values = <0x06 0x26 0x54 0x54
0x80 0x01 0x01 0x00
0x01 0x0A 0x01 0x81
0x05 0x20 0x0A 0x80
0x07 0x00 0x00 0x38
0x04 0x20 0x00 0x06
0x00 0x8E 0x0B 0x30
0x03 0x00 0x14 0x0D>;
/*ports {
#address-cells = <1>;
#size-cells = <0>;
//IN(DSI===>SN65DSI)
port@1 {
reg = <1>;
sn65_in: endpoint {
remote-endpoint = <&dsim_to_sn65>;
};
};
//out
port@2 {
reg = <2>;
sn65_to_panel: endpoint {
data-lanes = <0 1 2 3>;
lane-polarities = <0 1 0 1>;
remote-endpoint = <&panel_from_sn65>;
};
};
};*/
};
#endif
sn65dsi86_bridge: bridge@2c {
compatible = "ti,sn65dsi86";
reg = <0x2c>;
ti,dsi-lanes = <4>;
max,dsi-channel = <1>;
ti,dp-lanes = <2>;
pinctrl-0 = <&pinctrl_mipi_dsi_en>;
enable-gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>;
interrupts-extended = <&gpio5 12 IRQ_TYPE_EDGE_FALLING>;
/*vpll-supply = <&src_pp1800_s4a>;
vccio-supply = <&src_pp1800_s4a>;
vcca-supply = <&src_pp1200_l2a>;
vcc-supply = <&src_pp1200_l2a>;*/
clocks = <&sn65dsi86_refclk>;
clock-names = "refclk";
no-hpd;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
sn65dsi86_in: endpoint {
remote-endpoint = <&dsim_to_sn65>;
};
};
port@1 {
reg = <1>;
sn65dsi86_out: endpoint {
remote-endpoint = <&panel_in_edp>;
};
};
};
aux-bus {
panel {
compatible = "novatek,nt71832","panel-simple";
status = "okay";
dsi-lanes = <4>;
//video-mode = <2>;
//pixel-format = <RGB888>;
backlight = <&edp_backlight>;
port {
panel_in_edp: endpoint {
remote-endpoint = <&sn65dsi86_out>;
};
};
};
};
};
Is there any modification required in the mentioned dts