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LMH0397: CDR Reset Control register (0x0A) question about reserved bit 6 function.

Part Number: LMH0397


Hello,

I have a question on the CDR reset control register bit 6 function on the LMH0397. We were trying to interface to a somewhat crappy HDMI-to-SDI converter and were having lock issues so we were trying to improve the signal integrity by adjusting EQ settings or bypassing and/or CDR bypass, etc without much luck. During checking out the CDR options, we inadvertently set bit 6 of register 0x0A (CDR reset) to '0' and the video cleaned up significantly. More so than any other options we tried. Can you tell me what that bit does? I provided a dump of the CTLE/CDR register space below (w/ 0x0A=0x10)

Thx - Tom

  • Hi Tom,

    Hope you're doing well.

    A CDR reset will trigger the device CDR to relock to the incoming signal. Typically, the CDR reset register is used by enabling the register override on bit 3 and resetting the CDR on bit 2. The bit 6 on 0x0A accesses a reserved bit on the register. The improvement you see in your application has not been characterized because it is reserved.

    The LMH0397 CDR should be reset after changing CDR lock settings or equalization behavior. Below is a typical Read and Write operation to reset the CDR. 

    COMMAND REGISTER VALUE MASK //COMMENTS

    RAW FF 04 07 //Enable CTLE/CDR Register Page

    RAW 0A 0C 0C //Reset for the new settings to take place

    RAW 0A 00 0C //Release CDR Reset

    Best,

    Nick