I'm using the DDC level shifter features of the SN65DP159, however the SCL_SRC pin appears to be broken:
- The DDC_CLK signal idles at 0.5V when connected to SN65DP159 SCL_SRC. When disconnected from SCL_SRC, it idles 3.3V.
- The DDC_SDA signal doesn't not have this issue. It is connected to SDA_SRC and stays at 3.3V.
Could there be damage to the IC? Does TI recommend any troubleshooting steps? Can TI provide any more insight into the "Active DDC block" circuit?
Configuration:
- SN65DP159
- Intel DDI input (AC coupled)
- DDC bus 3.3V levels, 2kohm pull ups
- HDMI output
- DDC bus 5.0V levels, 2kohm pull ups
- Pin strapping
- HDMI_I2C_EN = 0
- HDMI_SWAP = NC
- HDMI_EQ_SEL = NC
- HDMI_SEL_N = 0
- HDMI_TX_TERM = NC
- HDMI_SLEW = NC
- HDMI_PRE_SEL = NC
- HDMI_OE = 0
- VCC = 3.3V, VDD = 1.1V
- HPD buffer/level shifter is working properly
- Circuit closely follows EVK design, possible to send the schematic in a direct message
