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TCA9509: The relation of VIL and VILC

Tamio Yokokura
Expert 3720 points
Part Number: TCA9509
Other Parts Discussed in Thread: TCA9803, TCA9801,

Hi, TCA9505 support team

The below is Recommended Operating Conditions and Electrical Characteristics captured from datasheet.

VIL in Recommended Operating Conditions is described that VIL is less than 0.3V. However, VILC in Electrical Characteristics is specified that VILC is minimum 110mV. 

This recommendation appears to be inconsistent. I think that the recommended VIL should be less than 110mV. Why is it recommended to be 0.3V?

I've read other E2E's but can't understand this discrepancy.

Regards,

Tamio

  • 0
    Guru 284830 points

    VILC is relevant only when devices on both sides are pulling the line low at the same time; when a master is on the B side, this happens only when another master is on the A side, or when a slave uses clock stretching. But you are correct that in the general case, you should design for VIL = 110 mV.

    (If you do not need 5 V, consider the TCA9803 instead.)

  • 0 in reply to Clemens Ladisch
    TI__Expert 3720 points

    Hi, Clemens

    The below is customer's block diagram. And HDMI Re-driver being a slave device on B-side has a clock stretch feature. Therefore, in customer use case, Intel SoC being a master device on A-side is not required to drive the low level to less than 110mV and need to consider only VIL<0.3V.
    However, if a slave device with a clock stretch is connected to A-side, an input low level needs to consider VILC=110mV. I understood like this. Is my understanding correct?

    Thanks

    Tamio

  • 0 in reply to Tamio Yokokura
    Guru 284830 points

    The the slave might do clock stretching, then the master must drive below VILC.

    The TCA9801 would not have this restriction.

  • 0 in reply to Clemens Ladisch
    TI__Mastermind 33553 points

    Hi Tamio,

    If the HDMI re-driver has the capability to clock stretch on B-side, the Intel SoC must be able to drive A-side below VILC < 110mV as Clemens has mentioned.

    Clemens is also correct about the TCA9801. The device direction control mechanism in this type of buffer operates off of a internal current source instead of a static voltage offset requiring two voltage level inputs (VIL, VILC). 

    TCA9801 sounds like a better fit for this application, due to the inability for Intel SoC to meet the <110mV VILC requirement. 

    Regards,

    Tyler

  • 0 in reply to Tyler Townsend
    TI__Expert 3720 points

    Hi, Clemens and Tyler

    If a slave device on B-side never occur the clock stretch, a master device on A-side isn't required to be driven the input low level below VILC<110mV. The input low voltage is below VOIL<0.3V

    Is this thought correct?

    On the other hand, I don't think the master device on the A side needs to be driven below 110mV during clock stretching if the slave device on the B side can experience clock stretching. I think it is sufficient if the master device simply recognizes CLK=LOW during the period of clock stretch.

    Is my thought wrong?

    Thanks

    Tamio

  • 0 in reply to Tamio Yokokura
    TI__Mastermind 27811 points

    Hi Tamio,

    For best practice, I would still confirm that the device on A side (in this case, the Intel SoC) is capable of driving a logic low signal within the limits of VILC parameter to ensure that it is capable of pulling the I2C bus low.

    Tamio Yokokura said:
    On the other hand, I don't think the master device on the A side needs to be driven below 110mV during clock stretching if the slave device on the B side can experience clock stretching. I think it is sufficient if the master device simply recognizes CLK=LOW during the period of clock stretch.

    The problem is more so the device (TCA9509) itself is not able to sense which side of the device is driving low- this will result in a bus lock up. Once A side drives below VILC, the device will be able to recognize that side A is driving low to side B. 

    If this is not feasible in your design, please take a look at the TCA980x I2C buffer as recommended by Clemens and Tyler. 

    Regards,

    Jack 

  • 0 in reply to Jack Guan
    TI__Expert 3720 points

    Hi, Jack

    According to the actual measurement of input voltage on A-side connecting to Intel SoC, it was less than 100mV. Therefore, a customer decided to use TCA9509.
    I recommended TCA980x based on your advice, but they doesn't prefer it because is package size is bigger than TCA9509.

    Thanks

    Tamio