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DP83848I: What should we do to meet MII interface timing spec?

Part Number: DP83848I

Hi Experts,

Engineer told me they found their RMII interface timing cannot meet timing spec of DP83848. Datasheet specification requires minimum TXD data setup time of 4ns (TXD to X1 rising). They are using RMII to interface SOC to DP83848. Both MAC in SOC and DP83848 x1 input are clocked by a same 50MHz source. The problem is they found the TXD data setup time (T2.26.2) is only about 2ns, cannot meet the spec (4ns MIN). What should they do to close this problem? (they had checked their SOC seems no way to adjust this timing in SOC.)

Thank you!

John