Dear expert,
Customer config BRIDGE_CFG2 Register (Address = 0x56) as DSI Reference Clock Mode.
When they stop DSI traffic including DSI clock, does UB941 switch to internal reference clock to LOCK FPDlink automatically?
I know this scenario should be avoid but customer just wants to know what will happen at this abnormal case.
It seems at this scenario sometimes their SoC at UB941 side still can access UB948 register (mean still LOCK) but sometimes they cannot. It makes them confused.
Thanks
